Gtot = Ginamp ∗ Gopamp
The circuit for the entire analog operation was lifted from the datasheet for the amplifier used in this project, the INA321. This schematic is shown in the figure below.
There was a bug in this schematic, where the opamp furthest to the right would immediately saturate. Thanks to Moreno's ECG project, this bug was located early and dealt with, by removing the 1MOhm resistor from the + input to GND, resulting in the schematic as shown below (you canalso find this schematic in the CircuitMaker project).
I can explain most of what's going on here, except the part at the bottom with the Right Leg Drive.
In order to see the amplified diff signal, the in amp needs a reference voltage to add to it, preferably half the supply voltage to keep it in the center.
The voltage reference is generated by a simple voltage divider with a bypass capacitor. The constant current drain through the divider was not accounted for in the prototype, and the 10kOhm resistors (originally 4k) would help drain the battery through the always on voltage regulator (the system was soft switched, and still is). The device did not have long shelf life.
The in amp is configured with a gain of G = 10, using the ratio of the resistors between REF, RG and Vout as described in the datasheet:
G = 5+ 5(R4/R7)
It will take the differential + common mode signal at the input, attenuate the unwanted common mode signal and put the wanted differential signal on top of the reference voltage of the in amp. In other words, it will output
Vout = Vref +G ∗ (V+ −V−)
The 100k resistors are in series with the electrodes to protect the amplifier from ESD. Another set of modification is the capacitors connected to the inputs of the amplifier, meant to decouple high frequency interference, and the 2M resistors leading down to the Right Leg Drive. These were, as Moreno suggested, replaced by four 1M to keep the BOM one line shorter. This is common practice to keep the number of reels during manufacture low.
Right Leg Drive
This part has me and others stumped.
In theory, this is what I suspect it is supposed to do:
The instrumentation amplifier may attenuate most of the common mode signal, but as explained in Signals and noise, common mode currents will convert to differential mode signals because of differences in impedance in the skin-to-inamp signal path, and we want to minimize this effect.
The RLD is fed the voltage between the differential inputs which is in effect the common
mode signal. This signal is buffered, compared to Vref and amplified in a inverting op amp
configuration before it’s driven back into the body.
The gain of the RLD is R15/R14 = 39. R17’s function is to protect the amplifier from ESD.
Looking at the actual circuit, which is lifted from the datasheet, I just fail to make sense of it. The op amp to the left is configured as a voltage follower, so that Vref is present on the output. The op amp to the right is configured as an inverting amplifier, which means that both inputs are Vref, the same potential... How can the common mode signal be separated and amplified from this, let alone anything? Also important to note is that the Vref is indeed the common mode signal, since Vref lies perfectly between the two electrode inputs. If Vref was separated from the common mode signal it would make sense, but as it is now it's hard to wrap the mind around it.
If you wanna chip in on this, feel free to!
Voltage reference driver
This is basically a feedback network using an op amp configured as a filtered integrator. Deviations of the output signal to the reference will build a voltage in the opposite direction and feed it to the reference pin, eliminating baseline wander. The corner frequency of the network can be calculated as fk = 1 / (2 pi RC).
This op amp is configured as a non-inverting, differential amplifier and anti-aliasing filter in one. The signal from the in amp is compared to Vref, and any deviation is amplified by
G = R1/R5+ 1 = 69
It would be no different than having a non-inverting op amp configuration referenced to ground, like in the figure below:
The signal components of interest in an ECG lies between 0.01Hz and 300Hz. For a digital system, a sample frequency equal to 2 to the power of n is preferred. Our closest match is 256Hz, but according to Nyquist’s Theorem, the sampling frequency must be twice that of the highest frequency component, which means a sampling frequency of 512Hz. Any frequency components above 256Hz will show up as aliases, which means we need a low pass filter, or anti-aliasing filter if you will.
C1 adds a 1. order low pass filter characteristic to the amplifier, by adding a corner frequency
fc = 1/2piR1C1 = 49.8Hz
By 256Hz the signal is attenuated
|H| = 1/ ( sqrt(1+ f /fc)) = −7.9dB
Which is a gain of 0.4. Not many frequency components are expected in this area plus the next couple of decades, so that is adequate.