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Quad 2-input AND gate

A project log for ED-64: A discrete 8-bit computer

ED-64 will be an 8-bit computer built with discrete components, and will feature a ferrite core memory (documented as a separate project).

andrew-starrAndrew Starr 10/05/2015 at 06:542 Comments

The current task is to get the stack address decoder boards populated with the required logic modules. The flip-flops have been made and tested, next up are the AND gates. The PCBs are currently being made by pcbway. Here's the schematic for a single AND gate (there are 4 of these on a module board):

According to LTSpice, this gate design should be good for several MHz, with an average current consumption of 10mA (driving 1 downstream gate input).

Here's a screencap of the PCB (power and ground planes turned off):

Discussions

Yann Guidon / YGDES wrote 10/08/2015 at 18:16 point

I am curious : why does the AND gate need 5 transistors when the AND function is simply provided by the 2 input diodes ? Since the rest amounts to a double inverter, 2 transistors should be enough, or so I suppose... Please elaborate on your design choices :-)

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Andrew Starr wrote 10/08/2015 at 21:45 point

You _can_ build an AND gate with a minimum of transistors, however you end up with a circuit that has less than optimum speed, power consumption and drive capability. I chose a 'totem pole' 2-transistor output to provide decent current sinking capability (for good fanout). The upper transistor in a totem pole functions as an 'active pullup' so you don't need to sink its current when the output is low. 

To drive the totem pole, you need a third transistor driving the 2 totem pole transistors in complementary fashion. If I wanted a NOT gate then I could stop here. However for an AND gate I need an extra inverter function between the input diodes and the complementary output, which is what the final 2 transistors do.

Yes, it's not the simplest gate I could have built :) But I'm hoping the performance will justify the more elaborate design.

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