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AND gate passes testing

A project log for ED-64: A discrete 8-bit computer

ED-64 will be an 8-bit computer built with discrete components, and will feature a ferrite core memory (documented as a separate project).

andrew-starrAndrew Starr 11/05/2015 at 02:174 Comments

I modified the FF jig to test the AND gate I had soldered. The jig tests each gate with all 4 binary combinations of input, and looks for the correct binary result. 4 green lights = 4 good gates:

Each gate has a red LED to indicate output state.

I also did some speed tests. Here's a gate output waveform with both inputs driven by a 1 MHz square wave:

and at 2 MHz:

some over/undershoot present but not too bad. There is provision on the module for loading some capacitance to smooth it out if necessary. I would have liked to have driven it faster to find its maximum switching speed but my signal generator only goes up to 2 MHz.

Finally, I wanted to see some lights blinking so I wrote some crappy arduino code for the jig to do it:

Discussions

Andrew Starr wrote 11/06/2015 at 02:11 point

The documentation that exists is all in the project details. The rest is in my head or hasn't been decided yet. I'm making a point not to plan too far ahead to avoid being overwhelmed :) Right now I'm concentrating on the Data and Return stacks. The address decoder panels have been built. As soons as I have all the plug-in modules I need, I can get the up/down address counters and row/column core matrix selection working.

Then there will be a mini-research project to get the 8x8x8 stack core matrices working.

That will leave:

1. The system memory (more or less a larger version of the stack, with a loadable address)

2. ALU  - nothing special here, just a matter of enough logic

3. Program ROM

4. Microcode control

Then I'll be down to the mostly cosmetic stuff like operator panel, I/O etc.

Don't fret about an emulator...plenty of work to do first!

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Yann Guidon / YGDES wrote 11/05/2015 at 09:18 point

That's pretty cool :-)

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Andrew Starr wrote 11/06/2015 at 01:52 point

Thanks! Now I just have to make some OR and NAND modules and I can get the up/down counter section of the address decoders going

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Yann Guidon / YGDES wrote 11/06/2015 at 01:56 point

That's pretty easy, once the AND works :-)
Still there is the question of your overall architecture.
I suppose that your main PCBs are already made so you must have a rather good idea or plan but you don't document it openly. This makes it difficult to write an emulator of the T-1.

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