48 byte packets are flying accross from TX to RX. my RTL SDR looks busy with 4GFSK at the correct frequency !
I tried bit shifting >> 24 to uint8_t and back again <<24 and copying the samples back into I2S driver ( passthough ) and everything sounded as good as 8 bit gets :)
At the reciever end I am recieving the packets, unpacking the recieved 48 byte packet array into a circular buffer as they come in. The I2S driver is pulling samples from the circular buffer as it needs them.
So there should'nt be a timing issue ? but maybe there is !
The circular buffer warns if it runns out of samples, its not, it warns if it overflows, its not.
I am only TX ing 1 out of every 4 samples, I tried every other and every sample. I get differnt ringing sounds almost like a delay effect.
could it be packet order ? maybe , next thing to do is just send a uint8_t number as the first byte of every packet.
after that maybe send a stream of numbers that increase in value and see if they are consistant ! perhaps my GFSK radio config is malforming the data. Its hard to debug, if you use the Serial terminal then obvusly things stop working !