EDIT 20180918 : Please see the erratum/confession at the bottom !
Private discussions and readings (books, online etc.) bring a very important question : what's the fastest gate for discrete circuits ?
ECL is notoriously fast. @Dana Myersrecently played with it and reached about 0,5ns propagation time in inverters in a ring oscillator, on a breadboard and with a fistful of MPSH10.
(note : the ideal current is about 4mA per gate and the oscillator reaches 307MHz on breadboard)
On the other hand, Complementary Transistor Logic is a bit like DTL but the input diode is replaced by a PNP. This greatly increases the input impedance and helps with many things. Operating voltage and current might be significantly lower, it even reduces the transistors count by 2 compared to ECL. But if it's easy to get one sort of FAST transistors, the complementary type might not be easy, as cheap or as fast... I have only stocked one type of germanium (PNP, because Ge NPN is rare) and silicon (well, I have mostly NPN, some PNP but i have no idea how to find a PNP equivalent of BFS480...
(as usual, the 2 diodes in series could be replaced by a red LED ?)
The BC857 has a high gain so the input current can be very low and this reduces fanin/fanout issues. The speedup capacitor might need some tuning, maybe 1 or 2nF ? And the resistors could be reduced to increase current and speed.
I've also read mentions of hysteresis of CTL gates, due maybe to capacitance, which can reduce the operating speed. A Schottky diode might be needed to remove bias buildup... or even add a resistor in parallel with the speedup capacitor ? Or what about simply avoiding the voltage shift by using more power rails ?
Another parameter is : sometimes, using better and faster transistors simply lets the gate run faster. But it can come at a high price so topology is still critical...
Now, the only way to compare is to try, right ?
(repost courtesy of @Dana Myers )
Just for the sake of discussion, Fairchild had their own TTL family back in the day when the 74-series was not an industry standard (or Fairchild had their "74F" series). They did TR, TD and TT : transistor-resistor logic, transistor-diode logic and here transistor-transistor logic. The datasheet shows no Baker clamp, but R5 might have helped...
But 5 transistors for one NAND, that's similar to ECL density :-D
EDIT 20180918 : Mea Culpa !
Apparently I made a big mistake and used the wrong schematic for CTL.
CTL seems to be derived from ECL and is claimed to be even faster (for certain values of "fast" because I still have to try it)
From what I have gathered from the MT15 project, with BC847\BC857:
- TTL with some load: 50ns.
- TTL Schottky clamped: 35ns.
- Differential ECL: 20ns.
- CTL two input AND gate: maybe 5ns. To be measured...
The schematic is subtly different from the one I included earlier :
As above, the inputs are PNPs that short the base node to GND. However the difference with the previous schematic is the output stage: it is a follower and not a "shorter to GND", so it does not saturate.
Note also that the gate above is a AND gate and no inversion takes place. I'd love to see an inverter, a MUX, a OR, a XOR...
I'm also unsure about the logic levels, temperature susceptibility and noise : I'll have to compare to ECL and DCTL :-P
The availability of a richer set of logic functions is critical for me, but there is an added simplicity to CTL : one can use SIL resistor networks to keep the parts count low and share a single package for several gates. No caps, no diodes, only 2 resistors with very close values...