Before I forget, here are some more details.

The system worked great, almost out of the box.

For a better margin, I spied on the clock signal's waveform and the 'scope saw that the signal was too fast to go all the way to 0V so I slowed down the polling interval. The result was even better.

The system is fully synchronous because the Finite State Machine is driven by a high-speed, high-priority event loop for real-time display. This adds quite some jitter to the clock signal. This is not important as long as the clock is delayed and not triggered earlier (hello POSIX !). Special care was taken in the code to preven "early switching" which would disrupt the communication pretty often.

The rest of the code is a pretty standard Finite State Machine with 3 main states:

1. init / desynchronised (waiting for the "1" marker)
2. synchronising (waiting for a series of 9 "0"s)
3. synchronised (running fine)

Hysteresis has been added in the code to absorb any spurious signals.

Oh, and there was even more fun tweaking the code to deal with multiple button presses!