Instruction Set Architecture

A project log for Bexkat1 CPU

A custom 32-bit CPU core with GCC toolchain

Matt StockMatt Stock 12/11/2015 at 23:571 Comment

The ISA for the CPU is pretty low density. With a word size of 32 bits, there's a fair amount of room to do everything... except for absolute addresses and some large constants. As I've experimented with the ISA, I've left gaps, extra bits, etc and it's a bit messy. I'm starting to clean up and make things a little more orthogonal now, with the idea that this will also allow the CPU core to become more efficient.

The ISA is defined in my Opcode worksheet, and I try to make sure this is up to date as I make changes to the core and the assembler.

After some review, it turns out that it's a little more compact than I originally thought. Here's a summary of the types of opcodes. Most of them share a common structure.

REG00oo oooo oxxx aaaa bbbb cccc xxxx xxxx
REGIND01oo oooo vvvv aaaa bbbb vvvv vvvv vvvv
IMM10oo oooo vvvv aaaa xxxx vvvv vvvv vvvv
DIR (32 bit)11oo oooo vvvv aaaa bbbb vvvv vvvv vvvv
DIR (64 bit)11oo oooo xxxx aaaa xxxx xxxx xxxx xxxx AAAA AAAA AAAA AAAA AAAA AAAA AAAA AAAA

The key for the above is:


Yann Guidon / YGDES wrote 12/12/2015 at 01:24 point

neat :-)

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