Never settle, kids !
Electronics is an experimental science, that's why I love it :-) As long as you have not tried everything, you can't be sure ! Yesterday I had not explored the whole design space and something was missing. Well, I couldn't leave all the stones unturned so I came back to this today.
I moved the clock enable transistors between the latch and the data-clear transistors to see if this changed something. Well, I feared the worst due to capacitive coupling(s) but actually it turned out better.
That's the traces with the new topology : top trace is the Q signal (latch output) and the lower trace is the latch's gate. It's cleaner and I can better see the RC curve.
The difference is enormous and the capacitive coupling is not as catastrophic as before.
But wait, there was still the couple of Ge diodes (1N60). What if I remove them ?
Howdy ! They are almost identical ! There is just a slightly different slope here or there.
I saved 2 parts and it's still as fast !
It seems that the resistor value is really important too and 10K is "right" for 30KHz. No wonder that it failed at 30K Ohms, the FETs are fully latched in the middle of one level so at 30K Ohms, the value is not settled (almost but not by much).
It allows me to deduce a handy rule of thumb : if 10K Ohms is ok for 32KHz, then 20K is ok for 16KHz, 40K-> 8KHz, 80K -> 4KHz etc...
It's funny because I finally come back to the original design but I got the resistor values wrong, thinking they were not significant. At 32KHz, they are, but at low frequency (a few Hz) 100K Ohms or 1M Ohm is ok. I'll have to find a compromise but it allows a wide range of options that lead to even more economies.
Lesson learned :
the resistors are OK for small, slow circuits. Fast circuits need to be devoid of resistors because the RC cells are too much a hassle. If I want to make a faster design, I'll be forced to use a 12T FF.