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Board assembly part I

A project log for T030

MC68030 based single board computer

Tobias RathjeTobias Rathje 03/02/2016 at 01:130 Comments

I started with the CPLD the ensure I have a working JTAG interface:

After verifying that the JTAG port is alive and the CPLD is programmed with the first version of the glue logic, the oscillator is mounted and the various clock signals checked:

In the first version the 25 Mhz clock is divided to 12.5 Mhz to match the clock in the Application Note 1015 for the 68020. According to the documentation my 68030RC25 can run down to 12.5 Mhz, when I have a working prototype I can increase the clock. The clock is also divided by four as clock for th MFP.

Btw, I got a HP 1631D, It's awesome! :-) (and noisy).

Reset generation also in place:

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