About 10 months ago I started screen shot-ing my progress as a way to document what I've done. Here are those captures with a few notes

June 11th, 2013: Initial placement and move from 64-pin to 100-pin PIC32MX.

I know I do not follow proper procedure for drawing out a schematic, but I visualize things digitally, not with tactile means. My schematic capture also serves as initial placement for how devices would be arranged.

June 25th, 2013: When I established I would be working with 3, 160x128 displays at 16 bits per pixel, simplicity and math dictated that I needed an external frame buffer.

July 2nd, 2013: USB ports with LEDs for visual indication of cable being detected. Frame buffer adjusted for sanity.

July 5th, 2013: Additional I2C component spacing made and general cleanup as I learn Eagle

July 10th, 2013: USB Ports differentiated due to original need of a PWM controlled amplifier circuit. Solid state relays incorporated into the design.

August 6th, 2013: Discovered how to draw busses in Eagle, simplified traces and added additional USB ports. Research began on power subsystem.

August 21th, 2013: Initial draft of power subsystem implemented with 2 switching regulators. The thought process for this area will be discussed later. Added to schematic capture.

August 27th, 2013: JTAG added. 14V power added. Accelerometer added.

September 11th, 2013: I2C-to-SPI bridge and uSD card added. Digital POT added. 100 PSI sensor replaced with alternate with same range, accuracy, and resolution but 1/3rd the cost.

This project exists in my free time. I took a hiatus for a while

November 28th, 2013: EGT amplifier circuit added. 12V power + 5V power theoretically implemented. After experimentation I believe I created a dual stage, variable amplifier that uses the first stage as feedback to control and limit the gain in the 2nd stage. Removed additional USB ports and associated solid state relays. 

Amplifier circuit: https://www.circuitlab.com/circuit/pf72sz/2-stage-self-adj-gain-rtd-amplifier/

Holiday hiatus

February 25th, 2014: Updated to reflect errors in wiring and changes due to initial PCB layout work.

Work hiatus

April 18th, 2014: MEMS oscillator added for clock control, minor cleanup, and Octal latches updated to different logic family so it's speed matches the SRAM frame buffer. They have the same pinout and package footprint.