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20MAR18 Update, Initial publication on hackaday.io

A project log for fRISCy: FPGA + RISC-V Digital Processing Board

fRISCy combines SiFive's new RISC-V microcontroller with a Lattice iCE40 FPGA for a platform that is all open source!

Stephen NewberryStephen Newberry 03/21/2018 at 00:010 Comments

20MAR18:

Original publish date on hackaday.io. At this point, the Artix-7 has been removed from the schematic, and the iCE40 has been added. Complete connection details on the iCE40 need to be added. Some component selection is still necessary (notably, what type of external memory to use on the FPGA). Additionally, the programming interface still needs design and validation.

The fRISCy schematic is approximately 70% complete, and PCB layout is approximately 40% complete. Design documentation needs to be generated as well, including:

Upon completion of the schematic, the following files will be generated:

Upon completion of the PCB layout, the following files will be generated:

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