• Review, teardown, and testing of LRS-75-24 Mean Well power supply

    5 days ago 0 comments

    General description

    LRS-75-24 is a 24-volt power supply with a maximum current of 3.2 amperes. According to the manufacturer, the unit operates at a mains voltage of 100 to 240 volts without an additional switch. It has no PFC function. The supply measures approximately 4 × 4 × 1 1/5 inches (99 × 97 × 30 millimeters) and is made on a printed circuit board fixed to the base of the metal case. The top cover is perforated, and the holes are meant for passive cooling.

    The input and output circuits are connected to a common screw block (1). From right to left, there are 3 terminals for the input line, neutral, and ground wires, and terminals 4 and 5 are the outputs: ground and +24V.
    The input voltage goes to the fuse and inrush current limiter (2), then to the RF interference filter (3), and finally, to the diode bridge (4). The inrush current limiter has no markings; apparently, it is just an NTC. The rectified mains voltage is supplied to the 150 uF, 400V capacitor (5) and then to the flyback converter built on an MW03A controller (located on the back side of the PCB), a TK750A60F transistor (6), and a transformer (7).
    The voltage from the secondary winding of the transformer is rectified by a Schottky diode HBR20150 (8) and supplied to storage capacitors 2×470uF 35V, and, through an additional LC filter (10) (11), goes to the output.
    The feedback circuit is classic; with TL431 (on the other side of the board), the feedback signal is transmitted to the PWM controller through one of the optocouplers (12); the second optocoupler forms a backup channel for overvoltage protection at the OVP output. The installed electrolytic capacitors are designed for operating temperatures up to 220F (105C). The bulkiest of them, the input one, is held on the board with compound.

    Build quality is good.

    The power transistor (6) and diode (8) are pushed against the metal case using spring brackets to dissipate heat. Their own housings are insulated using special shells.

    Test conditions

    Most tests are performed using Metering Setup #1 (https://teardownit.com/posts/power-control-unit-for-testing) at 80F (27C), 70% humidity, and 29.8 inHg pressure.
    The measurements were performed without preheating the power supply with a short-term load unless mentioned otherwise.
    The following values were used to determine the load level:

    Output voltage under a constant load

    It should be noted that there is a slight overshoot; increasing the load slightly increases the output voltage. Power-on parameters Powering on at 100% load Before testing, the power supply is turned off for at least 5 minutes with a 100% load connected.The oscillogram of switching to a 100% load is shown below (channel 1 is the output voltage, and channel 2 is the current consumption from the grid):

    The picture shows three distinguishable phases of the power-on process:

    1. When connected to the grid, the pulse of the input current charging the input capacitors has an amplitude of about 7 A and a duration of about 5 ms.
    2. Waiting for the power supply control circuit to start for about 88 ms.
    3. (Output Voltage Rise Time) Output voltage rise takes 7 ms.

    (Turn On Delay Time) The entire process of entering the operating mode from the moment of powering on is 95 ms.

    (Output Voltage Overshoot) The switching process is aperiodic; there is no overshoot.

    Powering on at 0% load

    The power supply is turned off at least 5 minutes before the test, with a 100% load connected. Then, the load is disconnected, and the power supply is switched on.
    The oscillogram of switching to a 0% load is shown below:

    The picture shows three distinguishable phases of the power-on process:

    1. When connected to the grid, the pulse of the input current charging the input capacitors has an amplitude of about 5.7 A and a duration of 6 ms.
    2. Waiting for the power supply control circuit to start for about 117 ms.
    3. (Output Voltage Rise Time) Starting the converter, increasing the output voltage,...
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  • Search for intermittent faults, and Pupin coils using a reflectometer.

    05/14/2024 at 08:02 0 comments

    Intermittent faults ('floating' defects) are damages that manifest themselves periodically and are caused by poor-quality core connections or reduced insulation resistance. Customer complaints about short-term connection losses are evidence of defects of this kind. Such defects may appear due to mechanical damage to the cable (for example, in the event of vibration from heavy vehicles, rotary equipment, etc., nearby).

    Typically, when a technician encounters this type of damage, he has to wait patiently for it to manifest itself, hoping the effect will last long enough to determine its location. There is no guarantee that the damage will reveal itself while the technician is on duty. The use of reflectometers allows one to automate this process and maximize productivity.

    Some reflectometers have a special function for detecting intermittent faults. The device connected to the line accumulates all reflectograms over a certain period and displays them superimposed on each other. Where the reflectogram differs, the intermittent fault is located.

    Finding intermittent faults

    For example, consider the following situation: a particular pair of cables works fine for the better part of the day, but there is a momentary failure out of the blue.

    We get two reflectograms for the same pair (with different gain settings) when checked. In the first one, with a gain of 12 dB, a surge of positive polarity is observed on the reflectogram of a working pair at a distance of 6760 feet, corresponding to the end of the cable. In the second one, when the gain increases by 14 dB, an additional spike appears on the reflectogram, the nature of which indicates the presence of a coupling in the cable at a distance of 3280 feet. By further increasing the vertical gain level, the reflectogram will not reveal the slightest sign of damage along the entire length of the cable being tested.

    We will need the 'intermittent fault detection' function mentioned above. By continuously monitoring the pair's condition, the OTDR shows any deviations from the cable's rated impedance, allowing the location of intermittent faults to be pinpointed.

    The reflectometer display will show the current reflectograms obtained during testing. Periodic inspections allow one to determine whether signs of malfunction have appeared. Once the non-persistent damage has been captured, the result should look approximately as shown in the figure.

    The differences will be evident if one compares it with the previous one. A noticeable drop appears where there was nothing before. The location of the fault can be determined by simply moving the cursor to the front of the pulse reflected from the break and reading the distance from the display.

    Random vibrations or other irregular events cause the connections to loosen and electrical contact to be temporarily lost, resulting in a fault similar to a partial break. Note that at the moment this fault occurs, the pulse reflected from the far open end of the line decreases because, due to a poor connection in the cable coupling, the magnitude of the electrical signal reaching the end of the cable is reduced.

    What conclusions can be drawn? Almost every type of cable system is susceptible to intermittent faults. Such damage creates severe problems for users and technicians. The intermittent fault detection mode of reflectometers allows one to continuously monitor the cable over a long period, so the technician does not have to waste working hours waiting for the damage to manifest itself.

    Pupin coils

    Pupin coils can still be found on an analog telephone line. Pupin coils disrupt the homogeneity of the copper pair, turning it into an ideal low-pass filter with more substantial high-frequency attenuation.

    Therefore, a prerequisite for using any xDSL technologies on existing phone lines is the removal of Pupin coils, which have been found to have extensive applications in US telephone networks. Servicing xDSL systems can always...

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  • How does binary logic work? Shift registers

    05/10/2024 at 06:28 0 comments

    Sometimes, a microcontroller does not have enough pins to receive signals from buttons or display them on LED indicators, control relays, etc.

    Sometimes, one needs to interconnect two digital devices with a single cable, and it would be great to transmit eight, sixteen, or more signals over two to three wires to avoid needing a thick cable.

    Or, let's say we just want to make a lighting effect for a street sign. One does not need a whole computer or a microcontroller for this task. All these cases (and many others) should be designed with shift registers.

    As children, many of us had an NES (Nintendo Entertainment System) game console. Its gamepad had 8 buttons: a plus-shaped button for left, right, up, and down, then Select, Start, A, and B. And there were only five wires in the gamepad cable: ground, +5-volt power, and three signal wires. Meaning the state of eight buttons was transmitted over three wires.

    In the core of the gamepad is a single CD4021 chip. It is an 8-stage parallel input/serial output shift register. Here is a diagram of its internal logic: the chip has eight inputs for parallel input and outputs from the last three flip-flops.

    This should look familiar to our audience: a sequence of synchronous D flip-flops passing the torch of data bits from one to another. Oh, that's our combination lock from the post on flip-flops!

    The CD4021 chip has two operating modes: serial and parallel. In parallel mode, eight flip-flops store information from eight inputs, each individually, regardless of clock pulses.

    In serial mode, at the edge of the clock pulse, each subsequent flip-flop receives a data bit from the previous one, and the first flip-flop gets an incoming one from the serial input.

    Then, where is the input pin to reset all flip-flops? The answer is there's none. However, you can pull the serial input low and send eight consecutive clock pulses. If necessary, we can write zeros to all memory cells. Although, in the case of a gamepad, one can do without it.

    Simply switch the chip to parallel input mode, and it will save the state of the buttons. Pressed-down buttons correspond to logical zeros; released buttons correspond to logical ones because parallel inputs of the CD4021 in the NES gamepad are pulled by resistors to the power supply positive.

    In this case, the DATA wire connected to the output of the eighth flip-flop will contain the state of the button S8 ('A'). We switch the chip to serial mode, apply clock pulses, and read S7 ('B'), then S6 ('Select'), all the way to S1 ('Right').

    Congratulations! We have read the state of eight buttons via three signal wires (plus two power wires). Then we toggle to parallel mode again, rinse and repeat. This mode toggling is performed lightning fast, and the player will feel like the console responds to button presses instantly.

    But what if it’s the other way around, and one doesn’t need to read information from buttons but to write it into cells, for example, by lighting LEDs? Then, a shift register with serial input and parallel output will help.

    An example of such a shift register is CD40194. Unlike CD4021, it has not 8, but only 4 digits. Yet it's got parallel output and input, as well as serial input, with the ability to shift both to the right and left!

    Does the CD40194 have a serial output, though? I hear you asking. Of course, it has! Q3 will be the serial output when shifted to the right, and Q0 will be the serial output when shifted to the left.

    The CD40194 also has a general reset input. And there are also two mode selection inputs: S0 and S1.

    When S0 = 0 and S1 = 0, nothing happens. The chip does not respond to signals other than a general reset, retaining the saved 4 bits of information present at its outputs Q0..Q3.

    When S0 = 1 and S1 = 0, a shift to the right occurs at the leading edge of the clock pulse, from Q0 towards Q3. And the value from the left-most serial input is written to Q0.

    When S0 = 0 and S1 = 1, a shift to the left occurs at the leading edge...

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