Time to test out IceStorm for some real project, I already had VHDL code that converts ICEd board to DIPSY programmer by making proper connections to the FTDI USB Chip on ICEd board. IceStorm supports verilog so here we go:

// ICEd as DIPSY programmer
// What it does: connects FTDI channel B pins to DIPSY socket
// so that Lattice and or other tools can see DIPSY UL1K SPI
// Interface on FTDI channel B MPPSE pins

module top(
// RGB LED
output LED_R,
output LED_G,
output LED_B,
// Small SMD LED (green)
output LED_small,
// DIPSY Socket
output DIPSY_MOSI,
input DIPSY_MISO,
output DIPSY_SCK,
output DIPSY_SS,
output DIPSY_RESET,
input DIPSY_DONE,
// FTDI FT2232H Channel B
input BDBUS0, 
input BDBUS1, 
output BDBUS2, 
input BDBUS4, 
output BDBUS6, 
input BDBUS7);

// We create "WIRES" here, they will be real connections!
assign LED_R = 1'b0;
assign LED_G = 1'b1;
assign LED_B = 1'b1;
assign LED_small = 1'b1;
assign DIPSY_SCK = BDBUS0;
assign DIPSY_MOSI = BDBUS1;
assign BDBUS2 = DIPSY_MISO;
assign DIPSY_SS = BDBUS4;
assign DIPSY_RESET = BDBUS7;
// optional
assign BDBUS6 = DIPSY_DONE;

endmodule // top

Thats it: the "assign" assigns input to output creating an electrical connection. But how does the code know to what pins those names belong? I was wondering too, but IceStorm tools support IceCube PCF constraints file:

# ##############################################################################
# Constraint for ICEd board to be used DISPY in socket Programmer
# ##############################################################################

set_io BDBUS2 7
set_io BDBUS6 1
set_io BDBUS7 10
set_io DIPSY_RESET 45
set_io DIPSY_SS 49
set_io BDBUS0 9
set_io BDBUS4 3
set_io DIPSY_DONE 52
set_io DIPSY_MISO 39
set_io LED_B 97
set_io LED_R 99
set_io BDBUS1 8
set_io DIPSY_MOSI 41
set_io DIPSY_SCK 38
set_io LED_G 98
set_io LED_small 96

This file does map symbolic names to the physical package pins.

So how to compile?

REM IceStorm binary have to be ..\bin and ..\share
..\bin\yosys.exe -q -p "synth_ice40 -blif top.blif" top.v
..\bin\arachne-pnr -p top.pcf top.blif -o top.txt
..\bin\icepack top.txt top.bin

This is script for Windows, for Linux it may be little different. First command does synthesis, then there is place and route and bitgen. As result we get a 32K binary file. This binary files contains the "configuration" that creates the actual electrical connection inside the FPGA package connecting some inputs pins to output pins.

Did it work?

Yes, compiled once, tried once and worked first try. Both the same code with compiled with ICEcube as the version compiled with IceStorm.

True respect to IceStorm !