• part 5: it goes open source

    3 months ago • 0 comments

    i've decided to make DSP 01 an open source project.

    you can find all the files here.

    this is not one of those open source projects where i misdirect you to an indecipherable Github folder. i've organized my files in a clear way. i want you to be able to see exactly what i did, how i did it, and how to do it yourself.

    i've put all my design files on an open source page where you will find everything you need to build yourself a DSP just like this one. you are welcome to.

    the faster i give away these projects, the less reason i have to stand still. it's not like i will sell it anyways - i already have a (massive) day job, and much bigger ideas to chase. so this one is for you - build it, learn from it, use it everyday.

    there are no strings attached. this is a gift.

    Tshen2 2014

  • part 4: setup & programming

    5 months ago • 0 comments

    i appear to have a DSP. time to set it up!

    first, the basics:

    1. do the two inputs (ADCs) work?
    2. do all six outputs (DACs) work?
    3. do my knobs and clip-indicator lights work?
    4. does it self-boot off of EEPROM?

    here's the architecture again:

    (DSP architecture, version 2 - final)

    as you can see, both ADCs and four DACs are built into the ADAU1701 itself. they communicate directly with the DSP core using internal Analog Devices magic. setting them up is easy!

    the two DACs in the AK4430 are more troublesome. they are supposed to receive digital audio through stereo I2S. i have zero prior I2S experience, so this is a bit of a bumble-thon.

    I2S seems to need these signals:

    • bit clock. (BCLK) for clocking the arrival of data bits.
    • serial data line. (SDATA_IN) for.. data.
    • left-right clock. (LRCLK) this indicates if your data goes to the left or right channel.

    the AK4430 also wants the 24.576MHz master clock so it can jostle its switch-cap filter, as mentioned in part 2. the master clock can be wired right in. but how do we generate the other signals?

    the ADAU1701 datasheet has the answer on page 46:

    (at 48kHz sample rate, the ADAU1701 can be the I2S master.)

    (the general-purpose IO pins, MP6, MP10 and MP11 can be our I2S bus)

    all DSP programming is done through the SigmaStudio software from Analog Devices. it is a beautiful example of flow-based programming, which is a great way to think about signal processing chains.

    so let's set up the I2S bus!

    (that 'Serial Output 1' box contains everything we need to know)

    why is the left-right clock (aka 'Frame Sync' clock, aka 'LRCLK') set to 'internal clock/512' = 48kHz? well, 48kHz is our sample rate. at every sample, we have to first send some right-channel data (with LRclock low) and then some left-channel data (with LRCLK high). that means, repeating at 48kHz, LRclock must spend some time low and some time high. so that is a 48kHz square wave!

    and why the bit clock (aka 'BCLK') set to 'internal clock/8' = 3.072MHz? well, it's transmitting stereo 24-bit audio. that means it has to transfer two 24-bit integers (at least 48 BCLK cycles!) for every audio sample. let's allocate 64 BCLK cycles per audio sample. if a clock is 64 times faster than our sample rate (48kHz), that's 3.072MHz.

    UPDATE: for some strange reason, in order to get the 48kHz sample rate, you need to set 'Frame Sync' frequency to 'internal clock/1024' and BCLK to 'internal clock/8'. it doesn't make sense, but that's what works. The image above has been changed accordingly.

    as for the LRCLK and BCLK polarity, that's taken straight from the AK4430 datasheet.

    now let's look at the GPIO (general purpose IO) configuration:

    for I2S communication with the AK4430, general purpose IO pins MP6, MP10 and MP11 are set to SDATA_OUT0, LRCLK_OUT and BCLK_OUT respectively.

    to read the position of the two control knobs (Volume & Balance), pins MP8 and MP9 are set to the inputs of the 8-bit auxiliary ADC: ADC3 and ADC0.

    to control the clip-indicator LED, pin MP4 is set to Output GPIO.

    next, how do we set up the EEPROM?

    the DSP uses a 24FC64FT EEPROM from Microchip. it has a capacity of 64kb, which is 8kB, so that is how i set up my Mem Size. the datasheet lists a '32-Byte Page Write Buffer', so i have set Page Size to 32 Byte.

    now that this thing is set up, i can finally doing something with it.

    these are the first speakers i ever built. on the left is a 12-inch subwoofer using a Dayton Reference driver and an M&K plate amplifier. on the right is one of the two biamplified main speakers, using Dayton tweeters and woofers. i will program DSP 01 to be an equalizer & crossover for the entire system, with the internal 4x100W amplifier driving two tweeters and two woofers, and the two line-level outputs controlling the subwoofer through the M&K plate amplifier.

    but that is too much for all at once! first of all, let's get it working with just one main speaker.

    here is the signal flow for controlling one main speaker.

    the lower branch (starting with PeakEnv2 and PeakEnv2_2) checks...

    Read more »

  • part 3: UI and lasercut chassis

    6 months ago • 0 comments

    (analog signal processor, front panel, circa 2013)

    the single biggest difference between 'hacky' and 'solid' audio gear is the box it comes in.

    this isn't just vanity. well-constructed equipment lasts, which justifies its cost in cash and time. you won't worry when you move it. you won't worry when you touch it. the interconnects won't wiggle out of place, the volume control won't crackle or free-spin. the bloody thing won't catch fire.

    if it's performing for you, or you're performing with it, it won't give up, turncoat and die.

    it is a real pity that most hackers half-ass their boxes. above is my own attempt, in 2013, to turn a cigar box into an electronics chassis. there's no symphony to the position of anything. it's hacked together in all senses of the word.

    the inside is worse.

    (analog signal processor, inside view, circa 2013)

    are the circuit boards anchored by the tension of the wires? yes.

    are the jacks Loctite-ed with hot glue? yes.

    is the volume pot protoboarded and bolted to scrap plastic? yes.

    is every input and output tight-roped on unshielded wires? yes.

    this isn't even all. there were two stereo amplifiers and three separate power supplies, all with their own hacked-up boxes, and cables strung in between.

    it even took ages to hand-cobble this disaster. i'd completely overlooked mechanicals during the design phase. here was the result. never again.

    DSP 01 would be a singular, hyper-integrated thing. i would nestle the user interface, DSP core and quad-channel amplifier board into a single box. one 24V power supply would power the amplifiers as well as the DSP, through a 5V buck regulator.

    (UI board, version 1)

    the UI board plugs directly into the main DSP board, giving it RCA inputs, RCA/3.5mm outputs, two adjustment pots and indicator lights. i added a tiny knob to dim the power light. i lasercut holes in the front panel with my mechanical Eagle CAD technique, to exactly fit the pots and RCA jacks. the amplifier's heat sink would orient vertically to maximize passive cooling.

    (the entire lasercut assembly)

    then i went to lasers.

    (initial fit.)

    (those screws are too high. i'll have to cut holes around them.)

    (all precision projects must ebb to barbarism.)

    (banana jacks fit with a 4.8mm shoulder.)

    (the contact bulge meets the via.)

    (amplifier, DSP and buck converter.)

    (DSP in detail.)

    (ready for testing.)

    next update, i will describe my acoustic measurements and DSP programming.

    Tshen2 2014