All instructions are word-sized, except for those using offset addressing (see “Addressing modes”); offset may be treated as an additional word appended to the instruction. Unlike data, instructions must be aligned on word boundaries, i.e. have even addresses, to be fetched from memory.

Normally instructions are fetched from lower to higher addresses. Instruction pointer (IP) is always incremented by 2 or 4 after fetching, but before decoding and execution, so it always contains an address of the next word after the instruction being executed. This word could be either immediate data (see “Addressing modes”) or the next instruction.

There are exceptions from this routine, which are described in “Flow control” subsection.