Addressing is a way for CPU to locate operands used in instruction.

Addressing can be explicit or implicit. If an operand is encoded in instruction as a certain bit fields, then it’s an explicit addressing.

The CPU has 5 explicit addressing modes:

• register mode, when operand is located in any common-purpose register,
• relative, when the address of the operand is located in a common-purpose register,
• relative with subsequent increment, or post-increment, − the same as relative, but the register is incremented by the size of the operand after accessing the operand,
• relative with prior decrement, or pre-decrement, − the same as relative, but the register is decremented by the size of operand before accessing the operand,
• relative with offset, or simply offset addressing − the address of the operand is calculated as a sum of the register and an offset word; unlike post-increment or pre-decrement modes, this addressing mode is not altering the contents of the register.

If you are familiar with PDP-11 architecture, you may already notice the familiarity of AscetiCore’s common-purpose registers and explicit addressing modes.

Post-increment and pre-decrement modes can be used for implementing stacks, including call stacks. For the stack pointer to point to the last inserted element, stack must grow from top (higher addresses) to bottom (lower addresses), i. e. pre-decrement ST instruction must be interpreted as PUSH, while any post-increment one − as POP. Note that using call stacks and stack frames is not enforced by the CPU architecture. Call stacks and possible ABIs further discussed in “Flow control” subsection.

One more thing about post-increment and pre-decrement modes is that they always operate with increments and decrements of two when used with IP as an adressing register, even with byte-sized operands. It enables so-called immediate addressing mode, which is nothing more than a post-increment mode relative to IP.

Some instructions imply the use of a certaing operand by its type or purpose. For example, SR always used as an operand implicitly. IP and LR also can be used implicitly in addition to their regular, explicit use.