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CMOS NAND gate

A project log for Shared Silicon

Silicon proven way to reduce the cost of integrated circuit manufacturing by collaboration

shaosSHAOS 10/03/2016 at 04:100 Comments

LTSpiceIV model:

Voltage transfer curve:

When inputs both changed state threshold shifts right (blue line).

Magic layout:

3-input version (also presented in the archive):

and LTSpiceIV model for NAND3:

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