Introducing the OOD11

A project log for Building a PDP-11

Putting together a minimal LSI-11/23 from boards & parts

Steve TonerSteve Toner 05/06/2018 at 02:160 Comments

While reviewing this video before posting, I noticed two things:

  1. The jumper on the MXV11 board that I said enables the RAM is in the wrong place!  Apparently I held the board upside down (bus fingers pointing north instead of south) when trying to identify the location of W5.  So why did it work?  I have no idea what this location is for (looked at photos of other MXV11 boards, and none have a jumper in this location), but it isn't W5 so the RAM should have been disabled and my test should have failed.  I moved the jumper and everything still works, so apparently no damage done.
  2. The RUN light didn't come on.  This is driven by E54 on the CPU board, a 74LS138.  It should be pulling it low, but it only goes to 3.5V.  Thinking the chip could be bad, I replaced it, but no change.  Then I started poking around with my multimeter.  Turns out the MXV11 board connects the "open collector output of the clock" to bus line AF1, which is identified as SRUN L/SSpare 2.  So presumably it has a pullup to +5V, and that's too strong for the 74LS138 to overcome.  But why, DEC, WHY???  I can only presume that the MXV11 board predates the definition of AF1 as SRUN L, so this board is not fully compatible with the CPU board as is.  You enable the clock on the MXV11 by jumpering J3 (which connects to AF1/clock out) and J4 (which connects to BEVENT L: BR1 on the bus).  So there is no need for the MXV11 to be connecting to AF1 on the bus, and I will try cutting the trace.  Seems like this should have been documented in a micronote somewhere, but I haven't seen it...

[Update: it is NOT necessary to cut the trace.  See next log entry.]