Mostly working, at least. Just finished a few hours ago and aside from a few minor bugs, everything seems OK. I still need to implement the basic-interrupt controller and the single step unit, though, and I'm sure I'll find more bugs over the next few days.

Semi-related note: this marks the first commit where there's something to run! There's a Makefile that uses Icarus Verilog to build a little testbench for the CPU. If you feel so inclined, you can pop your machine code in the testbench's ROM and get a nice trace file of the CPU executing it.