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Single Input Gates

A project log for Ternary Computing Menagerie

A place for documenting the many algorithms, data types, logic diagrams, etc. that would be necessary for the design of a ternary processor.

mechanical-advantageMechanical Advantage 04/14/2019 at 07:300 Comments

Single-input gates (called in some contexts "monadic gates" or "unary functions") take one input and produce one output.

In binary logic, there are technically 2^2=4 possible single input gates, but two are trivial and one is of little interest as a logic gate. One, which we could call the "true" gate, would output a 1 no matter what the input. Another, which we could call the "false" gate, would output a 0 no matter what the input. Then there is the buffer which takes in a 0 or a 1 and outputs the same value. People who are into formal logic would call this the "identity" gate. It has not use as a logic gate but is useful at the circuit level for signal integrity and timing purposes. This leaves only the inverter as a useful logic gate. If it is given a 0, it outputs a 1 and if it is given a 1, it outputs a 0. Here is the truth table:

Input = 0Input = 1
Output = 1Output = 0

Ternary single-input logic gates have three possible input values and three possible output values for each input value. Thus, there are 3^3=27 different single input gates. Three of them are trivial and one is the ternary equivalent of an "identity" gate that just outputs what it is given. This leaves 23 that are of interest as logic gates. The 27 gates are as follows:

DesignationInput -Input 0Input +
0---
10--
2+--
3-0-
400-
5+0-
6-+-
70+-
8++-
9--0
A0-0
B+-0
C-00
D000
E+00
F-+0
G0+0
H++0
K--+
N0-+
M+-+
P-0+
R00+
T+0+
V-++
X0++
Z+++

Notice that the designations are *not* numerical values. The ternary number --- does not equal 0, nor does -+- equal 6. They simply distinguish one gate from another. The designations are ripped off directly from Dr. Douglas W. Jones at the University of Iowa. His site  http://www.cs.uiowa.edu/~jones/ternary/ formed much of the foundation for my own work. Most of the remainder of this post is based on his work found at the above linked site.

The designation scheme is called heptavintimal which is a term modeled on the word "hexadecimal" for a number system with 27 values. The letters where chosen from the set of ASCII characters least likely to be confused with another value such as the letter O being mistaken for the number 0 or the letter I being mistaken for the number 1. These characters should always be upper-case just like in hexadecimal.

These "hept" numbers fill the same need that hexadecimal numbers fill in binary systems. They are a convenient way to refer to otherwise bulky amounts of data. One hept number is equal to three trits in the same pattern as given above. Because the gate names and the hept numbers align, you only need to learn one system for both purposes and we won't need 27 separate logic symbols for the various gates. A box with an "E" in it lets you know that the truth table for the gate is - => +, 0 => 0, and + => 0. Likewise, seeing "EEE" in a "hept-editor" would tell you that the ternary value you are looking at is 9 trits with values +00 +00 +00.

Let's run through some of the interesting gates:

the 0-gate, D-gate and Z-gate are the trivial ones that have no logical value. They always output the same thing regarless of input. The P-gate is the equivalent of the buffer which always outputs whatever was input. This also has no logical value, but would, like the binary buffer, be useful for signal integrity and timing. The 5-gate is the ternary equivalent of the binary inverter and produces the compelement of the input. -'s become +'s and vice versa, while the 0's remain the same.

In0-GateD-GateZ-GateP-Gate5-Gate
--0+-+
0-0+00
+-0++-

The 2 and 8 gates deserve special mention as they both invert the -'s and +'s (like the 5-gate does) but the 2-gate treats the 0 as a - whereas the 8-gate treats 0 as a +. These can be used as binary to ternary converters with different thresholds. The 2-gate could be called the negative ternary inverter and the 8-gate could be called the positive ternary inverter. The 5-gate can be distinguished as the simple ternary inverter. Thus the three types of inverter are the NTI, STI, and PTI.

In2-Gate8-Gate
-++
0--
+-0

The 7 and B gates are also of particular note. They produce the function of incrementing (7-gate) and decrementing (B-gate).

In7-GateB-Gate
-0+
0+-
+-0

Gates 2, 6, and K share a useful property in that they output + in only one case but - in both other cases. These can serve as decoders where they only output a + under one specific condition. 2-gates output + on a - input and can be called an "Is False" gate. 6-gates are + only for a 0 input and could be called an "Is Intermediate" gate. The K-gate outputs + on a + input and could be called the "Is True" gate.

In2-Gate6-GateK-Gate
-+--
0-+-
+--+

Dr. Jones calls the 6-gate the "Is Unknown" gate, implying that 0 is logically an "unknown" value. I avoid calling 0 "unknown", "indeterminate", "invalid", "don't care" or any other similar term because the value of any logic symbol is contextual. In some particular data type or algorithm, 0 may in fact be used for an unknown value. But in general cases where there is no particular context I prefer to use the neutral term "intermediate", meaning simply that it falls between - and +.

Gates V, N, and 8 have a similar relationship. They output a - only in one case and output a + otherwise. Therefore they can be called the "Is Not" gates. V outputs a - only when it receives a - and could be called the "Is Not False" gate. N outputs a - only when it receives a 0 and could be called the "Is Not Intermediate" gate. 8 outputs a - only when it receives a + and could be called the "Is Not True" gate.

InV-GateN-Gate8-Gate
--++
0+-+
+++-

Gates C and R can be called clamps. The C-gate clamps the + down to 0 and could be called a "Clamp Down" up while the R-gate clamps the - up to 0 and could be called the "Clamp Up" gate. The convert the range of values from false-true into false-intermediate (C-gate) or from false-true into intermediate-true (R-Gate).

InC-GateR-Gate
--0
000
+0+

These are the most notable gates but one other point deserve mention. The gates in which each input value corresponds to only one output value (such as 7 or B) have the property of being reversable. This is accomplished by passing the output through the same gate either one or two more times (depending on the gate) at which point the output is the same as the original input. The gates where one input value corresponds to more than one output value (such as C, R, or 8) do not have this property and are not reversable. The only reversable gates are 2, 5, 7, B, F, N, and P.

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