Close

A8-19: Can be seen too!

A project log for Let's experiment: NEC V20 + FPGA

What happens when you connect a NEC V20 to an FPGA? Let's find out!

uncle-yonguncle-yong 05/25/2019 at 15:480 Comments

After connecting all these wires from the V20's A8-19 to the FPGA and quickly turn on the SignalTap, it's already known that it is starting from the reset vector 0xF_FFF0.

My next step is to have these connected to a simple, small 16-byte memory block and run a short piece of code there.

Discussions