Operation principle

A project log for Kobold K2 - RISC TTL Computer

A 16 bit RISC computer with video display, from just a few TTL and memory chips. Online C compiler and simulator available.

roelhroelh 09/12/2019 at 09:400 Comments


[ edit 20230125 more accurate drawings and more explanation ]

Main parts are:

Every instruction needs two cycles:


This will let the ALU calculate a new value and put this in the shift unit. Or it will store a data register in memory.

The inputs for the ALU are:

For memory operands, the address comes from an address register and displacement, or it is a zero-page address.  16 bit immediate operands can be selected by using the program counter as address register (and using a displacement).

Most of the parts in the CPU are directly controlled by bits in the instruction register, just as in the Data General NOVA whose instruction set is found HERE.


The contents of the shift unit is transferred to the destination register. The contents can be either shifted or unshifted. The PC (address register A0) is connected to the memory address. The next instruction is fetched from memory and is put in the  instruction register.

Incrementing the PC will be discussed later.


This shows how data from memory is added to a data register. 

The 4-bit displacement (coming from the instruction) is added to the selected address register to form the address. (Displacements are added to bit1 - bit4 and the address register contents must be aligned). In zero page mode, the address comes from the lower byte of the instruction.

The ALU can do a ADD or NOR operation. The result of an operation goes to a data or address register. By making combinations, the following other functions can be obtained:

Complementing a value (bitwise) is often used in this architecture, because it is needed for subtract and for most logical operations. It can be combined with MOV to a single instruction:

The NOR operation is only possible when the destination is a data register.

The same instructions can be done when the operand comes from an address register instead of from memory.  

This picture also shows that a Zpage address can be routed directly to the ALU. This provides the 8-bit immediate operand mode. This immediate mode can be used with all main instructions: MOV, MOVC, ADD, NOR.

Finally, storing a data register is straightforward. There are instructions for store-word and store-byte. An address register can be stored by first moving it to a data register.

Note that the output of the ALU is also written back to the stored register (not shown here) because this effect is not suppressed in the current version. Since the data register contents is present on both ALU inputs, the dataregister will be added to itself. This is used in the SHL (shift left) instruction.

Several topics will be discussed later:

I can already uncover a bit more by showing my nice drawing (it is from an early version and no longer accurate):