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Operation principle

A project log for Kobold K2 - RISC TTL Computer

A 16 bit RISC computer with video display, from just a few TTL and memory chips.

roelhroelh 09/12/2019 at 09:400 Comments

CPU BLOCK DIAGRAM

Main parts are:

Every instruction needs two cycles:

EXECUTE CYCLE

This will let the ALU calculate a new value and put this in the shift unit. Or it will store a data register in memory.

The inputs for the ALU are:

For memory operands, the address comes from an address register and displacement, or it is a zero-page address.  Immediate operands can be selected by using the program counter as address register (and using a displacement).

FETCH CYCLE

The contents of the shift unit is transferred to the destination register. The contents can be either shifted or unshifted. The PC (address register A0) is connected to the memory address. The next instruction is fetched from memory and is put in the  instruction register.

Incrementing the PC will be discussed later.

DATA FLOW FOR MAIN INSTRUCTION TYPES

This shows how data from memory is added to a data register. 

The ALU can also do a MOV or NOR operation. By making combinations, the following functions can be obtained:

The same instructions can be done when the operand comes from an address register instead of from memory. The displacement value (part of instruction word) is not used here. This opens the possibility to use these bits to enable other functions, like shifting or add-with-carry.

Finally, storing a data register is straightforward. There might be separate instructions for store-word and store-byte.

Several topics will be discussed later:

I can already uncover a bit more by showing my nice drawing:

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