PSoC Logic Resources

A project log for 3-Chip Z80 Design

Combining a Z80 retro design with a modern PSoC CPU. 09/22/2019 at 14:350 Comments

I've done quite a few PSoC designs. Some of them have reached the limit of logic that can be placed into the Programmable Logic area of the PSoC. The question is how many peripherals can be emulated in the PSoC before resources run out.

Currently I've got a UART emulator in the design. It has a status register and control register that can be read/written from the Z80. It also has data registers in both directions. The current resource planner shows that only 26 / 166 (about 14%) of the macrocells are being used.:

6 of the 24 Control Registers and 3 of the Status Registers are used. 

This leaves plenty of logic to implement functions directly as well as more Control/Status registers to emulate the Peripheral ICs.