Currently, Digilent Digital Discovery provides one of the best logic analysers at an affordable price - 32 channels at 200 MHz. This project achieves a modest 80 MHz for 32 channels using a Zedboard. Of course a Zedboard isn't an economical option if you want a logic analyser. However, it's a fun hobbyist-level project that gives you a free logic analyser if you already have a Zedboard.

An AXI stream is used to send data from the GPIO pins to a FIFO. The data is read from the FIFO and written to the DDR memory using the direct memory access (DMA) controller. Once the required number of samples is written in memory, they are read and sent over TCP to the logic analyser software. The software used in this project is open-bench logic sniffer (OLS). The SUMP protocol is used to interface with OLS.