A project log for TOSLINK DAC

Instead of a $10 box from Amazon, go above and beyond

Nick SayerNick Sayer 10/11/2021 at 23:060 Comments

I got v1.4 boards back from OSHPark. This is the version with the CS8146 in a QFN footprint. At first the prototype didn't work, but swapping out one of the PLL filter caps fixed it. I must have picked up the wrong one assembling it. This version also has dual RCA jacks for output. They take up most of the front panel, but they should be much more durable. And, no, I didn't buy gold-plated jacks.

The CS8146 version functions exactly like the DIR9001 version, but has a maximum sample rate of 192 kHz instead of 96 kHz. I suspect that is the maximum sample rate you can expect from TOSLINK. At 192 kHz sample rate, the bit clock is over 12 MHz, and S/PDIF has extra framing, so its data rate is even higher. 

The one thing I am not sure about is whether or not the CS8416 needs a reset circuit. The PCM1793 datasheet pretty strongly implies that it has a power-up reset circuit, but the 8416 sheet says that you have to hold !RST low until all power supplies and voltages are stabilized. I'm going to add a footprint for a MIC803 supervisor chip. It will hold RESET low during power-up and then for a few ms after the 3.3 rail is over 3.0 volts. Along with that, a pull-up on !RST. If nothing else, that will give us a more convenient spot to force !RST low if it's ever necessary.