Typically, four basic simulations are performed. This is helpful to understand influence of parasitic properties of electronic components and also helps to identify schematic nodes sensitive to parasitic capacitance to housing etc.
These simulations help to verify that LISN complies to CISPR-25 limits to impedance magnitude and phase angle. Both simulation results are in chart below.
Output impedance simulation with excessive harness inductance from power supply to LISN
Insertion losses simulation
Input to output isolation simulation
It is worth playing with simulation parameters:
inter-winding capacitance Cpar of inductor L1 which causes decrease of output impedance in higher frequencies and inductor self-resonance which deteriorates input to output isolation.
parasitic capacitance Cparbnc of signal output to GND which causes steep decrease of output impedance above 100MHz and also shifts a bit inductor L1 resonance frequency.
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