Parallel-In-Serial-Out Shift Register in CircuitJS

The Parallel-In-Serial-Out Shift Register is the heart of the project. Most of the other circuits are there to control the state of the shift register.

I implemented the shift register as the standard D Flip-Flop chain. I added a D Flip-Flop for every bit I needed to send, plus one flip-flop for the Start bit, and one more flip-flop as an output stage. The Stop bit doesn't get its own flip-flop, once the last bit is sent out of the shift register, any further clocks output a High signal. The state counter just runs for an extra cycle past the last data bit sent.

To implement a loadable D Flip-Flop I took the basic D Flip-Flop outlined in the "Basic Building Blocks" project log and added a mosfet switch leading to the capacitor on the slave side of the flip-flop. This allows the charge of the capacitor to be set independently of the clock. The outputs of the 1 bit data buffer feed directly into the transistor switches of each shift register stage. The output stage holds the last value that was clocked in so that the output of the shift register does not automatically change when loading the rest of the flip-flops. Not shown in the above diagram is that I added a mosfet controlled pull-up on the output stage to act as a "Set Pin". This set pin is pulled high when the transmitter is not running so that the output is held at the "Idle" State.