This section spans about two months of work. It took that long because I wanted to get the job done with the tools that were on hand.

Without going in to excessive detail about the reasoning, I picked a Z8 dev board to take the first look at the signal. Over the course of a few weeks, my code went from a for(;;) loop watching an I/O pin to two timers linked to the DMA controller. In the end, the latency and resolution were both reduced to a single clock cycle. I used the "gated" mode of the timer, one timer running while the I/O pin was at the high level and the other running while low. The timer's interrupt would be triggered when the timer's gate signal went to the inactive state, or when the timer reached its' stop value. Also, at that moment, the timer's count value would be stored in the DMA buffer. When a DMA interrupt triggered, the buffer's contents would be sent to the workstation via RS-232. There's a race-condition or two, but there are also periodic 150 mSec. pauses in the input signal, so there should be adequate time to transmit the bits. Now what?

My first step was to convert the clock-cycle counts into something I could display in GNUPlot, but seconds of data with 50 nSec. resolution became unmanagable. Enter PulseView and VCD file format. With a little bit of Ruby to convert the captured data to an acceptably formatted VCD, I can finally begin reverse engineering.