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microcode: complete but untested

A project log for risk-vee

An as-small-as-possible RISC-V implementation in Logisim.

Nicky NickellNicky Nickell 12/21/2016 at 05:553 Comments

I just finished the microcode image. Initially the plan was to write a prolog program that could read the instruction description pseudocode that I put together yesterday, but I ended up going with javascript instead. My prolog is really rusty and I wasn't in the mood to fight with it. Maybe next time.

Our microsequencer is 15-bits wide: 11-bits of opcode and 4-bits for the microinstructions of each instruction. This means the control store is 32kx32. In putting it together I noticed that every opcode ends with two ones. In a hardware implementation I would probably drop the bottom two bits which would shrink the control store down to 8kx32.

The control store is split up into 16 word entries. Every instruction can be up to 16 microinstructions long. The first entry takes care of fetching the next instruction and putting it into the instruction register. Each instruction ends with resetting the microsequencer by writing zeroes into the instruction register which starts the next instruction. This gives us a little quirk in the design. If we ever fetch an instruction with zeroes in the opcode bits we will hang there forever. Yup, we've got a halt & catch fire instruction.

I don't have the riscv toolchain set up, but I did manually poke an ADDI instruction into memory and it executed properly. The program that made the microcode image and a copy of said image are in the project files. If you go to play with it, right click on the control store ROM and select "load image." After that enable ticks (ctrl-k) and watch it run.

Discussions

Yann Guidon / YGDES wrote 12/21/2016 at 13:55 point

Can you turn the HCF into a NOP ?

  Are you sure? yes | no

Nicky Nickell wrote 12/21/2016 at 17:24 point

Unfortunately not very easily. In trying to be too clever I painted myself into a corner without noticing. As long as the entry that does the instruction fetch collides with opcode zero I'm stuck with it.

It isn't so bad for now, but a hardware iteration of the design would probably need to address the issue (or at least provide a HCF lamp so you knew why it hung).

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Yann Guidon / YGDES wrote 12/21/2016 at 18:20 point

The lamp/signal could trigger a trap, at worst reboot the machine or kill the program.

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