A little bit on Esp32-C6 Ultra Low-Power Second Core

A project log for Esp32-C6-Bug + Esp32-Bug-Eth

Playing with the new Esp32-C6FH4:

allexokallexoK 04/19/2024 at 21:000 Comments

This week I did some tests on Esp32-C6 second core. The core is intended to be low-power and can be run even when the main core is in deep sleep, which is pretty interesting. The core runs at 20MHz, has 16KB SRAM and only subset of pins available, but it can still run programs it just like the main core.

 Of-course the question is, how low power it actually is? Unfortunately, I was unable to find info about real power consumption of the ULP core so I decided to run some test.

Without further adieu here are the results:

Main core deep sleep, ULP core disabled
Main core deep sleep + ULP core GPIO poling once in 10mS
Main core deep sleep + ULP core Uart printing once in 1 second360uA
Main core deep sleep + ULP core full speed reading I2C sensor1622uA