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A project log for Gigatron TTL microcomputer

Just because! A home computer without microprocessor

Marcel van KervinckMarcel van Kervinck 05/13/2017 at 18:230 Comments

It seems I have reached the base camp. The el-cheapo 7-inch LCD monitor on the right is connected to the output port of my breadboard TTL computer. The computer is now running at 6.3MHz and runs a software loop that generates a VGA test signal. The colors look a bit off, and still not all wiring is done and tidied up, but the mountain top is definitely in sight.

As far as I can check with the oscilloscope, the signals are behaving nicely according to the VGA industry standard 640x480 at 60Hz. Yellow is the vertical sync and light blue is the horizontal sync.

The disassembly of the code:

0000 0009  ld   $09 ; setup for 10 lines vertical front porch
0001 a001  suba $01 ; next line in vertical blank
0002 c200  st   [$00]
0003 0200  nop
0004 0008  ld   $08 ; entry point for starting a new frame, inside the first hsync
0005 ec05  bne  $05
0006 a001  suba $01
0007 0200  nop
0008 18c0  ld   $c0,out ; end of first hsync in frame
0009 0055  ld   $55
000a ec0a  bne  $0a
000b a001  suba $01
000c 0100  ld   [$00]
000d ec01  bne  $01
000e 1880  ld   $80,out ; new hsync start
000f 000a  ld   $0a
0010 ec10  bne  $10
0011 a001  suba $01
0012 18c0  ld   $c0,out ; hsync end
0013 0054  ld   $54
0014 ec14  bne  $14
0015 a001  suba $01
0016 1840  ld   $40,out ; vsync start
0017 0200  nop
0018 0200  nop
0019 0200  nop
001a 1800  ld   $00,out ; hsync during vsync
001b 000a  ld   $0a
001c ec1c  bne  $1c
001d a001  suba $01
001e 1840  ld   $40,out ; hsync end
001f 0056  ld   $56
0020 ec20  bne  $20
0021 a001  suba $01
0022 1800  ld   $00,out ; hsync during vsync
0023 000a  ld   $0a
0024 ec24  bne  $24
0025 a001  suba $01
0026 1840  ld   $40,out ; back porch
0027 0054  ld   $54
0028 ec28  bne  $28
0029 a001  suba $01
002a 18c0  ld   $c0,out ; 33 lines black
002b 0200  nop
002c 0200  nop
002d 0020  ld   $20
002e 1880  ld   $80,out
002f a001  suba $01
0030 c200  st   [$00]
0031 0009  ld   $09
0032 ec32  bne  $32
0033 a001  suba $01
0034 18c0  ld   $c0,out
0035 0055  ld   $55
0036 ec36  bne  $36
0037 a001  suba $01
0038 0100  ld   [$00]
0039 ec2f  bne  $2f
003a 1880  ld   $80,out
003b 000a  ld   $0a
003c ec3c  bne  $3c
003d a001  suba $01
003e 18c0  ld   $c0,out
003f 0055  ld   $55
0040 ec40  bne  $40
0041 a001  suba $01
0042 0200  nop
0043 00e0  ld   $e0
0044 1880  ld   $80,out
0045 a001  suba $01
0046 c200  st   [$00]
0047 0009  ld   $09
0048 ec48  bne  $48
0049 a001  suba $01
004a 18c0  ld   $c0,out
004b 0004  ld   $04
004c ec4c  bne  $4c
004d a001  suba $01
004e 18d5  ld   $d5,out ; first colors
004f 0003  ld   $03     ; 9 clock delay
0050 ec50  bne  $50
0051 a001  suba $01
0052 18d7  ld   $d7,out ; second color bar
0053 0003  ld   $03
0054 ec54  bne  $54
0055 a001  suba $01
0056 18dd  ld   $dd,out ; third color bar
[...snip...]
008a 18ea  ld   $ea,out ; last color bar
008b 0003  ld   $03
008c ec8c  bne  $8c
008d a001  suba $01
008e 18c0  ld   $c0,out ; back to black (front porch)
008f 0200  nop
0090 0100  ld   [$00]
0091 ec45  bne  $45     ; repeat for 480-256 = 224 lines
0092 1880  ld   $80,out ; hsync start
0093 a001  suba $01
0094 c200  st   [$00]
0095 0009  ld   $09
0096 ec96  bne  $96
0097 a001  suba $01
0098 18c0  ld   $c0,out ; hsync end
0099 0004  ld   $04
009a ec9a  bne  $9a
009b a001  suba $01
009c 18ea  ld   $ea,out ; second half of screen (256 lines)
009d 0003  ld   $03
009e ec9e  bne  $9e
009f a001  suba $01
[...snip...]
00e1 0008  ld   $08
00e2 fc04  bra  $04 ; to new frame
00e3 c200  st   [$00]

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