NTSC Shield

NTSC Shield for Mojo V3

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NTSC video shield for the Embedded Micro Mojo V3 FPGA development board. Includes composite and S-video outputs, 8-bit 3-3-2 color RGB input, and 1 MB SRAM.

I love the Embedded Micro Mojo V3 FPGA development board. It's affordable, easy to use, and no frills. Combined with the book FPGA Prototyping by Verilog Examples by Pong P. Chu, the Mojo V3 provided me the perfected learning tool to jump into the world of FPGAs.

Embedded Micro does have a few expansion shields for sale, such as a SDRAM Shield, an IO Shield, and a Proto Shield. However, there is no video output shield available. Although an HDMI Shield is in prototype from Embedded Micro, I wanted to take a shot at building my own expansion shield. I feel VGA is tried and true with FPGAs, so I decided to take a crack at designing an NTSC video shield. Although NTSC video is a legacy video standard, it is far from gone!

This was a big project. Not only am I not an expert at FPGAs, but I knew nothing about the NTSC specification. There was a lot of learning along the way and I'm not even done yet. The specifications I came up with are:

  • Composite and S-video output
  • 8-bit color input
  • 1 MB onboard SRAM
  • Deconfliction with SDRAM Shield

For the first specification, the video output, I ultimately settled on the Analog Devices AD723. It has both composite and S-video outputs, load detect to power down unused outputs, and is 3.3 volt compatible (for the prototype, I used the AD725, however it is not 3.3 volt compatible). For the 8-bit color input, I settled on a 3-3-2 256-color RGB palette. This is consistent with how the Diligent NEXYS 2/3 and BASYS 2 boards output VGA. The 1 MB SRAM is based on the ability to store at least two 640-by-480 8-bit images. Finally, I wanted to deconflict with the SDRAM shield in case I wanted to add more system RAM to whatever I built in the future.

This shield is a great addition to my FPGA toolkit and has already proven itself!

NTSC Shield - AD723.pdf

PDF Schematic

Adobe Portable Document Format - 60.72 kB - 06/20/2017 at 23:37


NTSC Shield - AD723.sch

EAGLE Schematic

sch - 209.81 kB - 06/20/2017 at 18:55


brd - 103.49 kB - 06/20/2017 at 18:55


  • 1 × AD723ARU RGB-to-NTSC/PAL Encoder
  • 1 × AS7C38096A-10TIN 1M x 8-bit SRAM
  • 1 × ASV-14.31818MHZ-EJ-T 14.31818 MHz Oscillator
  • 1 × RCJ-014 RCA Jack
  • 1 × MD-40SM 4-pin Mini DIN Jack

View all 16 components

  • New Font ROM

    Ryan Clarke07/22/2017 at 03:06 0 comments

    I adjusted the font ROM to accomodate the full 256 character Code Page 437 and now load it via $readmemb from a list file. The font_test_gen and ntsc_test modules are also adjusted to print a 64-by-4 character array, vice the 64-by-2 from the old font ROM.

  • Project Article

    Ryan Clarke07/15/2017 at 13:17 0 comments

    Nuts & Volts magazine has expressed interest in a project article for the NTSC Shield. I've already written an outline and should hopefully have a draft to them soon

  • NTSC Shield Test

    Ryan Clarke07/10/2017 at 03:10 0 comments

    The SRAM and Video tests are now combined into a unified test.

  • SRAM Test

    Ryan Clarke07/09/2017 at 02:26 0 comments

    The SRAM test is complete for the NTSC Shield. The test benches have also been complete updated for the sram-only branch.

  • SRAM Test - Device

    Ryan Clarke07/05/2017 at 21:16 0 comments

    The Device Test is now functional. The final module is the Address Test Bus (I saved the most difficult for last). Hopefully I'll be done with that shortly and I can start working on the project write-up.

  • SRAM Test - Data Bus

    Ryan Clarke07/01/2017 at 15:43 0 comments

    A new branch has been added (sram-only) to test the NTSC Shield onboard SRAM. Currently a working Data Bus Test and appropriate test bench is functioning. Working on the Address Test now!

  • BMP File Output

    Ryan Clarke06/28/2017 at 03:26 0 comments

    I did some project restructuring, to include:

    • Directory structure: moved src/ files to rtl/ and sim/
    • Created ntsc_test and restructured mojo_top to reflect it
    • Updated comments in several files
    • Deleted no-serial branch and replaced with video-only branch

    The biggest change is the addition of BMP file output to the following test benches:

    • ntsc_test_tb
    • rgb_332_palette_tb
    • color_bars_tb

    Below is what you should see for the ntsc_test_tb output, which matches what you'd see on the television:

  • Verilog Uploaded to Github

    Ryan Clarke06/24/2017 at 02:05 0 comments

    The working Verilog code for the NTSC Shield is available on Github. There are two branches:

    • master: video test and basic SRAM test (activated via serial port)
    • no-serial: video test only

    Current working progress is to integrate the SRAM test results to the television, which will run on startup.

  • Video Test Complete

    Ryan Clarke06/22/2017 at 01:24 0 comments

    Well, it's been a long time coming. I started this project in February 2017 and have finally had a successful text, palette, and color bar test. Life got in the way and slowed down my progress, but progress has been made!

    There is a little bit of pixel jitter on the output, which I'm pretty sure is due to the fact that the FPGA is running asynchronous with the AD723. The FPGA outputs pixels at 12.5 MHz and the AD723 is running at 14.31818 MHz. I can fix this in the future with a board revision and some clock domain management, but it's not important right now.

    With the video test complete, I now need to work on a comprehensive SRAM test and output the results to the television. I've already ran a basic error check on the SRAM and output the results via serial, but I want to display everything on the television. Coming soon!

View all 9 project logs

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