LZB is "Leading Zero Blank" and it's a tiny visual feature that eases reading. When the most significant bits are cleared, the corresponding 7-segments digits are not turned on. I introduced this option in #DYPLED but I guess it existed long before that.
The first project that uses these display modules is #YGREC8 which is 8-bits wide, or only 2 digits. In this case, there is no real cascading. The circuit is very simple : the Zero output is tied to +3V when the input code is 0000, so this powers a relay coil (though a diode). The relay is "normally closed" and connects the 0V rail to the module. So when the input code is 0000, the relay opens and disables the display of the digit "0".
At first I wanted to mount that relay on the module. Then I decided that the circuit should be on the backplane because each module would need a special assembly, depending on their position.
The good news here is that the overall current is reasonable : the 6 segments draw about 13mA×6=80mA, OR max. 60mA for the coil (which cuts the 80mA when activated). Using a prebias resistor, this can be reduced a bit (at the price of more static consumption). So a spike would draw maybe 60+80=140mA, or 200mA worst case, and the two other relays in the decoding tree will not suffer too much.
(If you missed one episode, the RES15's contacts are rated at about 100mA)
This was the description of the wiring for the Most Significant Digit. The Least Significant Digit doesn't use a relay because its digit is always on, and its wiring is more straight-forward:
So a 8-bit bus requires 2 modules, as well as 2 diodes (one for freewheeling to the 3V rail) and one relay on the backplane.
For more bits, it gets a bit more complicated. In the case of 16 bits, 4 digits are required. The MSB looks like the first diagram and the LSB is like the 2nd diagram. The two other digits need more sophistication...