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Even better register set

A project log for YGREC8

A byte-wide stripped-down version of the YGREC16 architecture

Yann Guidon / YGDESYann Guidon / YGDES 02/27/2018 at 11:410 Comments

I think I cracked it :-)

The MUX8 are all identical and a circular permutation controls 7 bits. The last bit has a different permutation to reach the ideal fanout of the gates. Hopefully this will let me make a better register set, both with relays (easier construction) and with VHDL (shorter, more generic code).


Better :

I'm just trying to reduce the length of the wires and the long crossings :-)

Oh, that's even better :

The sequence of permutations is :
ABC
ABC
BAC
BCA
BCA
CAB
CAB
CAB

I now have to rewrite my register set VHDL code...

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