I have solved the AND issue :-)
The sign bit gets ANDed with the signed/unsigned mode bit. However a AND gate is pretty annoying to do "on the cheap". It's a "slow" operation so a dumb transistor might work but the diverse voltage/current considerations make it unpractical.
I could boost the signal with one inverter gate but they are all used. One Flip-Flop function could be borrowed from the remaining half of the 74HC74 but it has a kind of "forbidden state" (both /CLR and /SET active) that I want to avoid (it's nicely solved with the HC04).
OTOH there is this other FF that sits unused. The "trick" is to let it "copy" the sign bit (using the free-running clock) and "block" the output with the /CLR input from the mode flip-flop. It's ugly but no additional part is required and all the ICs are used to their fullest !
Well, one input is not yet used : address bit n°19 of the Flash array. I could add another mode but... what ? (octal won't fit by a little, btw)
Update: the remaining mode will be "show leading 0s" but this will only be available by tying a pin to GND, no fancy push-button there... It defaults to "hide" to save some power.