Today I successfully tested assembled 4-bit ALU (previous revision of NEDONAND-4 board with four NEDONAND-1 connected). In order to do this I slightly modified the board to connect nedoCPU-16 with it:
Then I wrote a simple program in PIC assembler that worked above PDBL (my Public Domain Boot Loader) to communicate with PC through good old RS-232. Program sent 4096 variants of input vectors (stressing ALU a little before every vector) and sampled output with delays 200ns, 600ns, 1.0us, 1.4us and 1.8us with logging every value:
Then I wrote C-program that analyze collected logs (see logs) and print report with incorrect values - it's appeared that some ADD operations were not be able to finish in 200ns, but all finished in 600ns (modified program collected 400ns moment also and all finished in 400ns as well - see logs). So ALU worst performance metrics are located somewhere between 200ns and 400ns. This is a little worse than I theoretically calculated using 74F00 spec - I expected 120ns delay (200ns in worst case if all chips have max allowed propagation delay 5ns), but in reality it's somewhere in 200...400ns range. Incorrect samples (here  means 200ns after inputs changed):
ADD 0EC 3F a=-2 b=0 c=1 -> d=-1 (15) c=0 (1) v=0 (1) ADD 0ED 3F a=-2 b=0 c=1 -> d=-1 (15) c=0 (1) v=0 (1) ADD 0EE 3F a=-2 b=0 c=1 -> d=-1 (15) c=0 (1) v=0 (1) ADD 0EF 3F a=-2 b=0 c=1 -> d=-1 (15) c=0 (1) v=0 (1) .... ADD F8C 03 a=-8 b=-1 c=1 -> d=-8 (0) c=1 (1) v=0 (1) ADD F8D 03 a=-8 b=-1 c=1 -> d=-8 (0) c=1 (1) v=0 (1) ADD F8E 03 a=-8 b=-1 c=1 -> d=-8 (0) c=1 (1) v=0 (1) ADD F8F 23 a=-8 b=-1 c=1 -> d=-8 (8) c=1 (1) v=0 (1)
See full output here. So most of the time it's incorrect most significant bit and/or flags C/V (carry and overflow). And as I said at 400ns everything is correct. Inputs are in formats BBBBAAAACOOO (12-bits represented by 3-digit hexadecimal number before ). Outputs are in format DDDVC (5-bits represented by 2-digit hexadecimal number after ). Then numbers in parentheses show actual numbers from the board...
P.S. All source codes are available on GitHub: