241 Results for "↘ 최저가 Ò1Ò〈⑻⑷89〉83Ò⑥ ↗ 쓰리아워㏃㏐addition쓰리아워Ⅶ강남술집정보강남술집정보Ｏ Ч강남술집정보exhibit 강남쓰리아워к강남술집정보㎼Ŋmethod"

DigitalJS
Project by Marek Materzok
In browser visual simulation of Verilog code
- 3
- 1

The FPGA evaluation board - Frankenstein
Project by Alex
In old PCB's i found a low-capacity FPGA(CPLD) - EPM7064. I decided to make a small evaluation board.
- 18
- 26

Coupled Physics and FPGA Simulation
Project by Adam Lange
An open source controller development workflow using OpenModellica for physics simulation and Icarus verilog for controller simulation.
- 2
- 1

The Last Psion
Project by Alex Brown
Resurrecting Psion's SIBO/EPOC16 Platform For The 21st Century
- 74
- 51

FPGA Boot Camp #4: State Machines
Project by Al Williams
Most FPGA projects will have at least one state machine. Learn how to create these powerful little dedicated CPUs in your designs.
- 29
- 16

netpp node
Project by Martin
Networked remote control on FPGA SoC
- 62
- 5

nedoPC-5
Project by SHAOS
DIY personal computer built around 32-bit version of RISC-V processor
- 44
- 37

FPGA Frankenstein as CW Transmitter
Project by Alex
Radio telegraph(cw) transmitter based on the Frankenstein FPGA evaluation board
- 870
- 6

DVI / HDMI Pmod for an iCE40 FPGA
Project by Dan O'Shea
Here is a proof-of-concept for DVI / HDMI output implemented on an iCE40 FPGA
- 15
- 9

HDMI to FPGA to APA102
Project by thomas
132 APA102 LED panels, 680 pixels per panel, 90,000 pixels, 300sqft, 4 Spartan 6 Mojo FPGAs
- 2.4k
- 18

FBus: Open FPGA Realtime Bus
Project by flow
Defining and implementing a bus protocol that is built around low-cost FPGAs to enable modular and affordable control and DAQ systems.
- 63
- 48

FPGA Game Console
Project by Stanislav
This is my graduation project for B.Sc. in Electrical and Electricity Engineering.
- 8
- 6

Axiom: 100+kW Motor Controller
Project by Marcos
High Power, High Performance 400V 300A 100+kW Motor Controller fully compatible with VESC®
- 1k
- 870

Transparently encrypting SD card adapter
Project by eywdck2l
An SD card that transparently encrypts data with a public key. Reading the data written requires the private key after a power cycle.
- 7
- 7

Kilsyth: ECP5 FPGA and a USB 3.0 FIFO bridge
Project by Konrad Beckmann
An ECP5 FPGA and a FT60x FIFO USB 3.0 bridge. Useful for high speed data transfers to external hardware.
- 17
- 17

|<
<
13
14
15
16
17
>
>|