49 Results for "∇ 최저가 Ò1Ò《⑤⑦93》74⑸⑻ ∇삼성동뉴테란Ω선릉뉴테란consent삼성동뉴테란ゑ선릉뉴테란ice 강남뉴테란ｆ선릉뉴테란√강남뉴테란ηⅡ뉴테란셔츠룸knight"

Camera Streaming from Petalinux on Zedboard to PC
Project by Nikos Katsaros
The goal is to stream images from a camera connected to a Zedboard running Petalinux, via TCP sockets to a Client PC
- 16
- 8

Phased Array Sonar
Project by David Gronlund
Using ultrasonic transducers to build a phased array!
- 18
- 9

FPGA with WS2812s
Project by tehaxor69
This uses the DE0 Nano FPGA with 4 WS2812 drivers.
- 2
- 1

NetPi-IDE
Project by AlanH
Low cost IDE/PATA disk emulator using a RPi Zero that also brings wireless networking to vintage computers.
- 70
- 63

SNES Gamepad FPGA Module
Project by Ryan
Verilog module to read SNES gamepad status.
- 4
- 7

360° Wavelet Unwrapping
Project by Alexis Rey
Unwrapping 360° video with real-time wavelet enhancement to artificially improve resolution
- 695
- 8

fRISCy: FPGA + RISC-V Digital Processing Board
Project by Stephen Newberry
fRISCy combines SiFive's new RISC-V microcontroller with a Lattice iCE40 FPGA for a platform that is all open source!
- 25
- 22

eeColor Color3
Project by Tom Verbeure
Reverse engineering the Color3
- 17
- 14

FPGA 101 Workshop Badge
Project by Miodrag Milanovic
Badge based on Upduino 2 board for Hackaday Belgrade 2018 event. Used as development board for workshop.
- 354
- 14

Nand to Tetris in Verilog Part 2 - Verilator
Project by Aria
This project includes info I've used to use to simulate Nand2Tetris (Compiling Verilog to C++ and using a test bench in C++)
- 2
- 1

Nand2Tetris in Verilog Part4 - Pong Simulation
Project by Aria
This project will show to Verilator and libSDL2 can be used to simulate a running program on the Nand to Tetris computer.
- 4
- 4

DVI / HDMI Pmod for an iCE40 FPGA
Project by Dan O'Shea
Here is a proof-of-concept for DVI / HDMI output implemented on an iCE40 FPGA
- 15
- 9

HDMI to FPGA to APA102
Project by thomas
132 APA102 LED panels, 680 pixels per panel, 90,000 pixels, 300sqft, 4 Spartan 6 Mojo FPGAs
- 2.4k
- 18

FBus: Open FPGA Realtime Bus
Project by flow
Defining and implementing a bus protocol that is built around low-cost FPGAs to enable modular and affordable control and DAQ systems.
- 63
- 48

HDMI FPGA FeatherWing
Project by Brian Gilbert
A Lattice ECP5 FPGA with DDR3 RAM and 1080p HDMI in a Feather form factor.
- 14
- 11

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