38 Results for "《〈 문의 OIO↗5793↗7458 》〉강남초원의집㉩⅓everythingァ강남유흥강남룸㏁evidently 강남초원의집강남더킹 강남더킹‡강남룸Ⅹfaintly㈆"

Edison Host Flex Module
Project by Chris Hamilton
Implement Edison mounted Flex Module that raises GPIO pins to 3.3V and both USB OTG and USB console.
- 0
- 1

LSE-PC
Project by Pierre Surply
A compact IBM-PC compatible development board based on an Intel 80386SX CPU and an Altera Cyclone IV FPGA.
- 234
- 17

Ghost Kernel
Project by maxdev
Kernel & operating system for the Intel x86 platform written in C++ and Assembly https://github.com/maxdev1/ghost
- 7
- 6

ED-E: Home Automation and Monitoring System
Project by tyspa
Home Automation and Monitoring System with many sensors and actuators to keep your home safe
- 4.5k
- 27

DE1-SoC CycloneV experiments
Project by Bruce Land
The programming model I wish to use in ece5760 is LINUX running on the ARM processors, talking to hardware on Intel/Altera/Terasic board.
- 2.4k
- 18

wikitIDE: program arduino 101 visually
Project by minqi bao
This is a derivative wikit program for you to control arduino 101 neuron A.I. function with simply drag and drop
- 337
- 11

8048 Maze Generator
Project by Alan
An Intel 8048 is used to generate a maze on a memory LCD.
- 7
- 12

VGA graphics for ARM SoC
Project by Bruce Land
A VGA driver on the FPGA side of the SoC connects to the ARM side. 8-bit pixels were used to conserve memory on the FPGA
- 23
- 14

thingSoC NEOLED : NEOPixels on Intel Edison
Project by Pattern Agents
Controlling large amounts of WS2812 LEDs with the Edison is as easy as writing it to an I2C Memory Array!
- 256
- 0

Audio DSP on DE1-SoC
Project by Bruce Land
The Cyclone5 DE1-SoC has a nice audio codec, with support on the Intel/Altera Avalon bus. An Avalon bus master does the DSP, and runs codec
- 1.7k
- 18

Video capture using DE1-SoC HPS
Project by Bruce Land
The DE1-SoC board supports NTSC/PAL input through a Video Input subsystem in Qsys. A camera is attached to the yellow composite video jack.
- 19
- 15

Memory on Cyclone5 FPGA
Project by Bruce Land
The memory systems of Altera Cyclone5 FPGAs have various features and limitations. I will not talk about the HPS here, only the FPGA.
- 19
- 16

Fast FPGA Polygon processor for ARM
Project by Bruce Land
This is a start at making a graphics coprocessor for the on-chip ARM9 cpu on Cyclone5 FPGA.
- 14
- 11

FIFO interface between ARM and FPGA on DE1-SoC
Project by Bruce Land
A FIFO between the Cyclone5 ARM9 and the the FPGA fabric is a convenient way to abstract away communication between them.
- 28
- 24

Cyclone5 VGA16-bit color ARM interface.
Project by Bruce Land
The "DE1-SoC University computer" IP which ships with the DE1-SoC is 320x240 resolution. This is a conversion and simplification to 640x480.
- 16
- 11

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