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11 Results for "rtl-sdr"
FPGA + 3 R + 1 C = MW and SW SDR Receiver
Project
by
Alberto Garlassi
Look mum, no ADC!
49
40
FPGA Frankenstein as CW Transmitter
Project
by
Alex
Radio telegraph(cw) transmitter based on the Frankenstein FPGA evaluation board
870
6
Lets Go VGA: A PC FPGA Video Card
Project
by
Ian Hanschen
For real this time.
19
16
gorantla.anirudh3
Hacker
ASIC Design Engineer
Yash Kumar
Hacker
in
India
RTL Design Enthusiast..... Computer Architecture Drives me
Mani19133
Hacker
in
Delhi
FPGA, VHDL Expert
Nirmal Raja
Hacker
in
Erode
I am PG scholar, done RTL Design and Verification course
Pradeep Purushothaman Vadakkodathu
Hacker
FPGA/SoC IP Designer. Worked in 5GNR UE development.
Džanan Bajgorić
Hacker
richa.jani
Hacker
in
pune,india
I am Richa working as a RTL design engineer in bit mapper integration technology ,pune
Dan Johnson
Hacker
in
Crestwood, Kentucky
EDA, ASIC, FPGA, & Embedded Java engineer. Developing custom hardware and server platforms for 3D virtual worlds.