27 Results for "%EC%9D%B8%EC%B2%9C%EC%98%A4%ED%94%BC%EA%B0%95%EC%B6%94%E2%9C%9Awww%2Coptime4.com%EC%9D%B8%EC%B2%9C%EC%98%A4%ED%94%BC%20%EC%9D%B8%EC%B2%9C%EB%A7%88%EC%82%AC%EC%A7%80%20%E2%9C%9A%20%EC%9D%B8%EC%B2%9C%EC%98%A4%ED%94%BC%E1%98%9B%20%EC%9D%B8%EC%B2%9C%EC%98%A4%ED%94%BC%EC%82%AC%EC%A7%84%E1%98%9B%20%EC%9D%B8%EC%B2%9C%ED%9C%B4%EA%B2%8C%ED%85%94%20%EC%9D%B8%EC%B2%9C%ED%82%A4%EC%8A%A4%EB%B0%A9%20%ED%83%80%EC%9E%84"

Aper-Oculus
Project by Chance Reimer
A Kria SOM carrier board for high speed digital design
- 9
- 6

Arty A7
Project by jlbrian7
Testing the Arty A7
- 6
- 3

Memory on Cyclone5 FPGA
Project by Bruce Land
The memory systems of Altera Cyclone5 FPGAs have various features and limitations. I will not talk about the HPS here, only the FPGA.
- 19
- 16

ARISC 32-bit microprocessor
Project by mateuszo
Project include design of microprocessor, assembly language and compiler.
- 2k
- 13

TinyFPGA Programmer
Project by Luke Valenty
A dirt cheap open hardware USB-JTAG board designed to program TinyFPGA A1 and A2 boards.
- 83
- 60

HDMI PMOD
Project by Alexander Wranovsky
An HDMI breakout board for the high-speed PMOD slots on the Arty A7 35T
- 6
- 6

GM-Study-Max
Project by Frank
Application module board for the GateMate FPGA evaluation board E1, suitable for computer science education and FPGA training.
- 6
- 6

Video Input Delay Meter
Project by Mike Kibbel
An FPGA-based video input delay meter using a DVI output chip and an amplified photodiode light sensor
- 5
- 10

Arduino Vivado SDK
Project by Antti Lukats
Arduino library for Microblaze and Cortex A9, integrated with Vivado/SDK
- 3.3k
- 17

VDC-II
Project by Samuel A. Falvo II
Commodore 8568-inspired (and mostly compatible) video core for driving VGA-type displays.
- 40
- 30

Arduino Compatible Zynq Shield
Project by Antti Lukats
Xilinx Zynq SoC, Arduino Compatible, 2x ARM Cortex A9, LPDDR2 Memory, USB OTG, on-board USB JTAG and UART.
- 128
- 72

Backbone Bus
Project by Samuel A. Falvo II
Backbone is my proposal for an off-chip, Wishbone-inspired backplane interconnect that supports multiple bus masters.
- 9
- 8

snickerdoodle
Project by krtkl
ARM. FPGA. 180 reconfigurable I/O. Wi-Fi. Bluetooth. BLE. Size of a business card.
- 6.1k
- 70

ZyncMV
Project by AVR
Hardware Accelerated Machine Vision platform using the Xilinx Zync 7000 FPGA+ARM System on a Chip and OV04689-H67A 4K CMOS Sensor
- 912
- 24

OPC-5 - a CPU for FPGA, in one page
Project by Ed S
A 16-bit CPU, with 16 registers, described in 66 lines of code - with HDL, emulators and a macro assembler.
- 61
- 49

1
2
>
>|