D11 discharges the capacitor at each negative horizontal pulse coming from /CSYNC and causes pin 11 of IC25 to go LOW, which blanks the video output signal at U25C.
After the sync pulse leaves R4 start to charge the capacitor. While the voltage is below positive threshold of U25 inputs the video stays blank, thus generating the backporch level. After that the output of U25D goes HIGH and the video content coming from U5B pin 8 can reach the output.
It might be necessary to fiddle with the value of R24 according with the technology of U25 (LS, HC, HCT, etc)
The resistors R1,R2,R3 were calculated to provide full compatibility with RS170: 1Vpp @ 75 Ohms load, 70% Video, 30% sync, DC coupling at output (the latter is a de facto standard).
This circuit have not been tested yet on the ZX97 but works like a charm on TK85 (a ZX81 clone)