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SS Minnow - 8-bit Game Console

An amateur building an 8-bit game consolem based off of 6502 and ATMega processors.

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I've decided to take a plunge and try to build my own gaming console. The 6502 is special to me, so that's the heart of it - but I'm using some ATmegas for more modern stuff: serial I/O, Internet?, Video out, etc.

Fair Warning: I'm not a HW guy, I'm a life long systems/graphics/tech programmer. I was hesitant to post this because I'm sure I'll be doing countless things wrong - but I learn a lot from others' successes and failures, so maybe this will be of interest to someone!

Ever since playing the Intellivision and the NES I've always wanted to build my own console, it's time to full fill that dream!

It's called the SS Minnow, here are the part code names and descriptions:

The SS Minnow will consist of a motherboard and a graphic's board.  The motherboard is called The Island.  

The Island will consist of Gilligan (6502 CPU) for handling game code and the Professor (ATMega 162v) which will be the utility chip.  Gilligan will execute the cartridge code as well as update a display list on the graphic's board.  The Professor will be the motherboard work horse handling things such as serial i/o, peripheral i/o, SPI stuff (maybe?), etc. 

Gilligan can access 32 KB of RAM, and the Professor and Gilligan share a 256 bytes of that RAM (physical address 0x0200, 0x02ff) for back and forth packet communication.

The Professor has Internal RAM and additional items will be hooked up to his pins; currently peripherals and serial i/o, but in the future some SPI expansions might be added.

The Island's bus has lines to the graphic's board, the graphic's board is called The Ocean.

The Ocean will consist of Ginger which will interpret display lists and write scan line buffers to be consumed by Mary Ann for video output.  The current design is for Ginger and Mary Ann to be ATMegas, but the design is still in the schematic stage.

I'm not sure how much or little technical detail I should go in to - more can be found on the github along with all of the code the schematics - I've never done one of these projects before so hopefully I can find the right technical balance as I move forward.

  • Sprang Our First Leak

    trapper.mcferron3 days ago 0 comments

    Ran into problems on day 1!

    First - I messed up a chip pattern when designing the PCB and the through holes on BUS_SWITCH2 are too close together... It turns out I used DIP-56/600mil/x1.778   - I had no idea what x1.778 meant.. apparently it means the holes are closer together.. I'll have to research that more. 

    Second - the patterns used for BUS_SWITCH2 and BUS_SWITCH1 were reversed!  BUS_SWITCH1 should be a DIP-56 and BUS_SWITCH2 should be the DIP-48.. I'm not sure how that happened, but I'm still learning all the tools with DipTrace, so ... you know.

    Third - A couple of the lines failed to route and I didn't catch it - in DipTrace you can go to Verification->Check Net Connectivity to validate everything is routed correctly.  Lesson learned!

    Fourth - I figured I might be doing a few of these with my trial and error - so I started adding versioning to the board.

    Here is the previous one - with the red circle around the most egregious error I made:


    And here is the new one.. I just ordered it from jlcpcb.com and I'll update when it arrives!

  • Testing the Waters (PCB has arrived)

    trapper.mcferron3 days ago 0 comments

    Exciting update, the PCB has arrived - this week I will be attempting to hook everything up and see if it works.  I'm not expecting my first iteration to work.. but there is always hope - at least if it doesn't hopefully I can quickly figure out why.

  • Setting Sail

    trapper.mcferron4 days ago 0 comments

      This is my first entry - I started working on this ~ Nov 2017. 

      I have a bread boarded motherboard (see the youtube link) which seems to work, and I just sent off for the PCB. 

      For now my test code does this:

      1. The Professor reads raw controller input and packs it up for Gilligan. 
      2. Gilligan consumes it and creates a string based packet he sends to the Professor. 
      3. The Professor then writes it to serial out.

      The Professor will normally do controller reading and packet updating every VSYNC from The Ocean.. but right now it gets the interrupt from it's own 30hz watchdog timer.

      The schematics and raw details can be found in the github repo.

      Here's a rendering of the pcb I'm expecting...

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