This is just an overview of the core number crunching component of the processor:
There are two parts to it - ALU and Register File.
ALU is described in previous log.
The register file combines eight 16-bit registers, 3-to-8 decoder and two 8-to-1 16-bit multiplexers. One of the registers can be selected to be written to, and at the same time, output from two others can be channelled to respective ALU inputs.
Register File acts as sort of very small memory with 8 addressable words. Together with ALU it forms what I call Main Data Path -- the computing core of the processor, which by itself is quite capable. By feeding it the right sequence of commands it is possible to do multiplications and divisions, and probably some other functions not provided by ALU right away.
Here is screenshot of it in current implementation (together with ALU instruction decoder):