More conventional instruction sequencing

A project log for Kobold K2 - RISC TTL Computer

A 16 bit RISC computer with video display, from just a few TTL and memory chips.

roelhroelh 11/01/2019 at 22:020 Comments

This week I was working on the assembler again. As said in the previous log, the assembler is quite complex because it also has to place the instructions in the correct sequence. 

Although the instruction sequencing and the conditional branching can be explained, the inner working of the assembler will be obscure due to its complexity.

And if we ever come to the point where programs can be built on the machine itself, we also need an assembler that runs on the machine itself, so that must probably also be written in assembler (while the current assembler is written in Javascript). I shivered at the thought of having to code this again.

So I decided. Design change.

Thats the nice thing about a hobby project. You can keep changing. Your project can even keep changing without ever coming to an end....

The instructions wil be in sequence. There will be a hardware 4-bit program counter, that will address the instructions together with the other bits in the HC670 register, much like the Kobold-one.

At the end of a 16-instruction block, a jump instruction must be placed to go to the next block.  This will be done automatically by the assembler. Conditional branches will now also be done in a conventional way. 

The three NNN bits that hold the next slot number can now be used for something else.  This will make the decoding of the special instruction variants easier, and give room to provide more options for some instructions.

[ edit: In fact, the instruction variants vanished, making the ISA much more orthogonal. There is now also room for 8-bit immediates within the 16 bit instruction, and zero page size expanded to 128 words, see next log. ]