Inspired by the Kiwi68k, Ydraig68k, Stuart's Lambda 68k, and *far* too many others to name..
This is my attempt to make a 'real' computer.
My first attempt at both real electronics design (beyond blinking LEDs and arduino) and programming was a small 68008 machine to get my feet wet. The goal was to attempt to write some assembly, attempt to get a C cross-compiler working, and maybe talk to some peripherals. With how well it worked out I decided to make the next jump quite a bit more ambitious. This is the result.
The board is based around a 68000/68HC000/68010. It has:
4mb of onboard SRAM
2x serial ports
PS/2 keyboard and mouse
2x expansion slots
Multi-channel DMA (for the SCSI, FDD, IDE, and expansion slots)
I decided to take a break from the hair-pulling stress of a normal school term and only signed up for part-time; I should have a lot more time to tinker over the next few months.
The past few weeks I have been doing battle with GCC and newlib, and it's nice to finally have a pretty much fully-functional libc. It certainly makes testing the hardware easier to not have to do everything in assembly. I spent a couple of hours today reading through the grossness that is the ATA standard, and managed to get a drive to spit out a proper device identify block. Reliability is TBD but at least it's probably wired up right! A little more work, a couple more newlib stubs, adding in fatfs and I should have a full file system.
While running some quick tests to make sure all the basics are being covered (software floats, malloc, etc) I couldn't help but grab this ascii mandebrot off the IOCCC page:
Now that I'll have more time, I'll also have no excuse not to set up the logic analyzer and debug the DMA controller. It's the heart of what really makes this board interesting and unique - I've never seen another homebrew use it, and it would be nice to use for floppy, ide, and the eventual frame buffer and sound cards I design. It's also roughly half the routing and chip count! Without it this is just any other 68k homebrew. Hopefully it's an easy fix, because re-spinning a board with this kind of size and part count is expensive, time consuming, and *really* disheartening..
The assembly was a giant pain (as always) but the design seems solid. So far I've taken the DUART, PIT, RTC, ROM, RAM, and PS/2 chips through their paces. No stability problems or unexpected errors yet while cruising along at 10Mhz, and with a little care 12Mhz is conceivable. I'll throw it on the scope and see just how ugly things are under the hood though. Still haven't bothered with the FDD and HDD yet but I'm not overly worried about the interfacing - more with writing drivers/software.
There's the good news. The bad?
The DMA chip has been temporarily pulled. It was causing funny business. *Really* confusing funny business. Analog, intermittent, signals-in-places-they-ain't-attached-to kinda funny business. Considering the layout and configuration are totally unambiguous and copied directly from the datasheet, it's even more frustrating, and I'll have to find a day with a few solid free hours to start scoping things out and hunting the cause down. I almost wanna jump the gun and blame it on component failure/manufacturing errors, but that's still wishful thinking at this point. I just know that the board is clean, the joints look great under a microscope, and a chip is causing an error on a net it isn't attached to. sigh..
On the software side I've built a nice toolchain, and ported a handful of monitors/bootloaders. I even have the rosco68k firmware up and running, so that should increase the code base to play around with substantially. I still have to decide just how hard I want to lean into OS development. For now I'm happy with a little single user single process bare-bones BIOS, but who knows how that will change..
As always I underestimated my ability to focus on.. well, even just school, let alone anything else.
There were some snags bringing up the board (aren't there always?), and I discovered a handful of design flaws to fix as well. I also identified quite a few areas that could be cleaned up/simplified/sped up. The next revision will hopefully have the same functionality but with fewer parts, a slightly smaller PCB, and much better behavior at the intended 10-12Mhz clock rate. Maybe I won't put the DMA controller on the wrong side of the address buffers this time too. Just a thought..
Considering that almost all of the requisite information I needed to design and build this was found through hackaday to begin with, I decided to give back in *some* small way by documenting this project.
The design had been kicking around in my head for a couple months but I've been getting crushed by school. Spring break was my chance and I took it: over the last week I ordered the PCBs, all the components, and started bringing the board up.
Having only started in earnest a week ago, I'm incredibly happy with the results so far: after some very minor teething problems, the board came right up. I can *tentatively* say that the hardware works.
Exhaustive testing is going to take some time, and writing the drivers even more so, but as of week one I'm at least writing to and reading from the DUART, PIT, PS/2 controller, and DMA controller. I have yet to attempt initializing the FDC, SCSI controller, or RTC.
Short term goals for the coming weeks:
Talk to the the remaining peripheral chips
Build a new clean C environment and start writing a small c library (or start stripping down newlib)
Write some basic interrupt handlers and switch to interrupt-based keyboard and serial input
Attempt to read an IDE drive
Attempt a DMA transfer
Make a Github and start doing some sensible source management!
package up the schematics and gerbers and maybe even share them if I'm not too embarrassed by them
Build a BOM
Medium term goals are to write a basic shell, implement a filesystem, and look into creating some sort of executable format. I also have preliminary designs for a graphics card and a sound card to flesh out!
The LONG term roadmap is to progress from a through-hole 2-layer 8Mhz 68008 all the way up to a 4+ layer surface-mount 50-100Mhz 68060 dream machine.
I'm using a sort of tick-tock approach. Minimal 08 -> highly integrated 010 -> minimal 020/030 -> highly integrated 040/060. The hope is that it'll ease the transition from "ignore all electrical considerations" TTL to 50+ Mhz "transmission lines, termination, and parasitics are a thing." It should track fairly well with what I'm learning in school too!
Instead of trying to completely roll your own filesystem, you might want to look at available file systems. One I am looking at is FatFS by Elm Chan http://elm-chan.org/fsw/ff/00index_e.html.
Straight C code, processor agnostic, you need to provide the media interface routines (SD card, SPI, SATA, IDE, etc.)