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Getting Actual Hardware Made

A project log for VHDL/Verilog to Discrete Logic Flow

Work in progress: Flow to synthesize VHDL/Verilog code into a PCB

TimTim 11/09/2021 at 19:580 Comments

At some point everything has to be put to practice. So, today was time to order some assembled PCBs to check whether the flow actually results in working circuits.

I used the counter.vhd example as a test subject. Two implementation can be seen below. The upper design is based on 15 transistor DFF, the lower one on 7T DFF. The difference in complexity is quite obvious.

Both PCBs are routed with Eagle, which is still ok with smaller designs. The only manual modification I made was to set the outline and insert groundplanes. Lets wait for the results in 2-3 weeks.




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