Pilot-1 is fully functional!

A project log for Pilot-1 CPU (ECM-16/TTL partial build)

This is a proof-of-concept sub-project spun off from my main homebrew CPU project.

PavelPavel 01/23/2022 at 20:060 Comments

Previously I had some issues with the working of the setup, and then I was quick to blame the HROM and the Provisional Control boards for what I saw as stuck bits and intermittent resets. As I finally got to debugging, I found out that indeed there were a couple of problems in HROM. But that was not all, and to my surprise, a couple of bugs were found to be residing in the Calculating Core circuitry instead of Provisional control board.

The problems were:

- bit 6 was shared between r0 and r1 -- this was caused by malfunction (short) of one of the 74hc151 ICs in Src2 selector board of Register File; swapping in new IC solved the problem.

- bit 9 was added intermittently when performing ADD operation -- this problem was a bit tricky, as it was fairly rare event that was apparent on high clock speeds. Eventually I traced it to improper solder joint on under one of the 74hc86 chips of Negator circuit on Misc board inside the ALU. The joint looked ok from afar, but closer look revealed that two wires were just touching each other, and this contact was very bad; after soldering on that joint was properly done, the bug was gone. 

Since then no other bugs shown themselves, and the machine is apparently stable at 1 MHz clock, for several hours in row at least.

Following is the test program, which sets bit0 of r0 to 1, then moves t across all bits of registers r0-r6, and finally adds it to sum in register r7 (JNC and JNZ are equivalent in this case, as when the single bit rolls off, it is saved to carry, and register itself is zero, using both here just to test both work correctly):

0:    ADD r0 0x01    ;set bit 0 of register 0 to 1
1:    ROLC r0 r0     ;rotate r0 left through carry, saving result to r0 
2:    JNC 0x1        ;if no carry, jump to address 0x1
3:    RORC r1 r1     ;rotate r1 right through carry, saving result to r1
4:    JNZ 0x3        ;if not zero, jump to address 0x3
5:    ROLC r2 r2
6:    JNC 0x5
7:    RORC r3 r3
8:    JNZ 0x7
9:    ROLC r4 r4
A:    JNC 0x9
B:    RORC r5 r5
C:    JNZ 0xA
D:    ROLC r6 r6
E:    JNC 0xD
F:    ADD r7 0x01    ;when full journey is complete, add 1 to r7

And here is video of this program executing at different speeds: