Crono TDC is a Time To Digital converter designed to be implemented in FPGAs.

Contrary to the most classical architectures of TDCs, Crono TDC uses the Multi Phase Clock architecture. This allows the TDC to have a large number of channels without worrying about temperature drift or complicated placements/routing.

The project is not only the HDL for the TDC, it also covers the hardware implementation (PCB).
The PCB follows Cubesat Kit Bus specification to be compatible with most commercial Cubesat modules. Also, it follows VITA 57.1 specification to mount any sensor with this standard.