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STEbus 80C188 with parallel I/O (SC88PIO)

80C188 processor board documentation

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Just the catalogue page, manual, and circuit diagrams.
There is example code in the manual.
I bought a board and read the programmable chips. The PAL chips are based on the SC88T with added PIO logic. The application ROM was written in Borland C.

ROM  version 8.19 data 1995-05-30, type NM27C010Q-150 (128K x 8-bit)

U5 and U11 are AMD PALCE22V10H-25 which required my antique PAL reader.

J151.txt

Source code as bytes and ASCII. Allows you to read the internal ASCII strings.

plain - 414.34 kB - 06/08/2024 at 14:42

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J151-U11.EQN

eqn - 25.00 kB - 06/05/2024 at 00:51

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J151-U11.EQN.txt

text/plain - 28.72 kB - 06/05/2024 at 00:51

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J151-U5.EQN.txt

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J151-U5.EQN

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  • Project log

    Keith06/03/2024 at 20:52 0 comments

    2024-05-29 Someone has one of these! Looking forward to taking some pictures, reading the ROM and analysing the PAL chips.

    2024-05-31 Board purchased, should arrive next week.

    2024-06-03 Boards arrived! Some leakage residue around battery location. Removed the small battery, gave it a quick clean with IPA then photographed both sides.

    Inspection shows it is a version 2 issue 2 board. This differs from the catalogue photo. The CPU has changed from NMOS to CMOS, so it no longer has a heat sink and is in a PLCC package.  The newer board has an oscillator in a DIP14 metal can, and the battery was replaced by a much smaller one.

    Not too much visible damage - a few tracks are a bit corroded. We shall soon see if the board works or not.

    2024-06-08

    I don't have an 8086 disassembler, assembler, or the time to reverse engineer it. I have uploaded an assembler source file of bytes and ASCII strings. This helps identify which bytes are text and not instructions. 

    There is a assembler demo program in the manual. It initialises the board but does not demonstrate the parallel I/O.

    I can't think of an interesting application for it at the moment.

  • Circuit diagram

    Keith05/06/2024 at 12:25 0 comments

    Page 1. Serial and parallel I/O

    Page 2. CPU, ROM, RAM and logic.

    Components

  • Catalogue page

    Keith05/06/2024 at 12:16 0 comments

    Low-cost target and development system.

    The SC88PIO is an 80188 CPU, with up to 256Kbyte EPROM and up to 256Kbyte SRAM, with battery back and write protection on-board. The main applications are for fast low-cost target systems, or as the main CPU in large systems. The SC88PIO also integrates 28 buffered parallel IO lines on the 50-way Arcom standard Signal Conditioning Bus connector.

    The SC88PIO has two serial IO channels, two counter-timers, DMA, and interrupt handling. Eight lines are output (24mA sink), eight lines are input and eight are-bit-bidirectional (with 16mA sink capability), two are counter/timer inputs and two are counter/timer outputs. Therefore low cost target systems can be built with just a SC88PIO and a Signal Conditioning Bus board.

    Built as an enhancement of the low-cost SC88T, the SC88PIO is software-compatible with the SC88T. This allows use of exactly the same code and development tools as used on the SC88T. The interrupt, DMA and bus interface can be configured to be identical to the SC88T. The SC88PIO has extended temperature range and low-power CMOS options.

    Extended Temperature Range Options

    Interface

    STEbus default master

    Power consumption

    1.5A @5V, 30mA @±12V

    Features

    • 8MHz 80188 processor
    • 28 parallel IO lines
    • Up to 256Kb EPROM
    • Up to 256Kb SRAM - battery-backed
    • Two serial ports
    • Software compatible with SC88T
    • SourceVIEW development toolkit supported

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